| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-xfail-mips32r6.txt | 8 0x60 0x40 0x00 0x01 # CHECK: bnvc $0, $2, 4
9 0x60 0x82 0x00 0x01 # CHECK: bnvc $2, $4, 4
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| D | valid-mips32r6-el.txt | 52 0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 8
53 0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 8
54 0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 8
|
| D | valid-mips32r6.txt | 166 0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 8
169 0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 8
170 0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-xfail-mips64r6.txt | 8 0x60 0x40 0x00 0x01 # CHECK: bnvc $0, $2, 8
9 0x60 0x82 0x00 0x01 # CHECK: bnvc $2, $4, 8
|
| D | valid-mips64r6-el.txt | 54 0x01 0x00 0x40 0x60 # CHECK: bnvc $2, $zero, 8
55 0x01 0x00 0x82 0x60 # CHECK: bnvc $4, $2, 8
56 0x01 0x00 0x00 0x60 # CHECK: bnvc $zero, $zero, 8
|
| D | valid-mips64r6.txt | 185 0x60 0x00 0x00 0x01 # CHECK: bnvc $zero, $zero, 8
188 0x60 0x40 0x00 0x01 # CHECK: bnvc $2, $zero, 8
189 0x60 0x82 0x00 0x01 # CHECK: bnvc $4, $2, 8
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | valid.s | 348 bnvc $2, $4, 24 # CHECK: bnvc $2, $4, 24 # encoding: [0x7c,0x44,0x00,0x0c]
349 bnvc $4, $2, 24 # CHECK: bnvc $4, $2, 24 # encoding: [0x7c,0x44,0x00,0x0c]
|
| /external/v8/src/mips/ |
| D | assembler-mips.h | 701 void bnvc(Register rs, Register rt, int16_t offset);
702 inline void bnvc(Register rs, Register rt, Label* L) { in bnvc() function
703 bnvc(rs, rt, shifted_branch_offset(L)); in bnvc()
|
| D | macro-assembler-mips.cc | 1035 bnvc(rs, rt, &skip); in Bovc()
1050 bnvc(rs, rt, L); in Bnvc()
|
| D | assembler-mips.cc | 1418 void Assembler::bnvc(Register rs, Register rt, int16_t offset) { in bnvc() function in v8::internal::Assembler
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 708 void bnvc(Register rs, Register rt, int16_t offset);
709 inline void bnvc(Register rs, Register rt, Label* L) { in bnvc() function
710 bnvc(rs, rt, shifted_branch_offset(L)); in bnvc()
|
| D | macro-assembler-mips64.cc | 1181 bnvc(rs, rt, &skip); in Bovc()
1196 bnvc(rs, rt, L); in Bnvc()
|
| D | assembler-mips64.cc | 1404 void Assembler::bnvc(Register rs, Register rt, int16_t offset) { in bnvc() function in v8::internal::Assembler
|
| /external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 323 0x7c 0x44 0x00 0x0c # CHECK: bnvc $2, $4, 24
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 204 class BNVC_MMR6_ENC : POP37_BNVC_FM_MMR6<"bnvc">;
1320 class BNVC_MMR6_DESC : BOVC_BNVC_MMR6_DESC_BASE<"bnvc", brtargetr6, GPR32Opnd>;
|
| D | Mips32r6InstrInfo.td | 435 class BNVC_DESC : CMP_BC_DESC_BASE<"bnvc", brtarget, GPR32Opnd>;
|