| /external/llvm/test/CodeGen/ARM/ |
| D | cdp2.ll | 4 ; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.cdp2
5 define void @cdp2(i32 %a) #0 {
9 call void @llvm.arm.cdp2(i32 %1, i32 2, i32 3, i32 4, i32 5, i32 6)
13 declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
|
| D | intrinsics-coprocessor.ll | 20 ; CHECK: cdp2 p7, #3, c1, c1, c1, #5
21 tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
61 declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | intrinsics.ll | 20 ; CHECK: cdp2
21 tail call void @llvm.arm.cdp2(i32 7, i32 3, i32 1, i32 1, i32 1, i32 5) nounwind
25 declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-neon-crypto.txt | 38 # The other similar encodings are stc2 [0x00,0xfd,0x40,0x0c] and cdp2 [0x00,0xfe,0x40,0x0c]
42 # CHECK-NOT: cdp2
|
| D | invalid-thumbv8.txt | 24 # CHECK-V7: cdp2
29 # CHECK-V7: cdp2
34 # CHECK-V7: cdp2
|
| D | invalid-armv8.txt | 24 # CHECK-V7: cdp2
29 # CHECK-V7: cdp2
34 # CHECK-V7: cdp2
|
| D | invalid-armv7.txt | 24 # Undefined encodings for cdp2
|
| D | thumb2.txt | 270 # CHECK: cdp2 p7, #1, c1, c1, c1, #4
|
| D | basic-arm-instructions.txt | 396 # CHECK: cdp2 p7, #1, c1, c1, c1, #4
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | arm_instructions.s | 65 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
66 cdp2 p7, #1, c1, c1, c1, #4
|
| D | basic-arm-instructions.s | 409 cdp2 p7, #1, c1, c1, c1, #4
412 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
|
| D | basic-thumb2-instructions.s | 303 cdp2 p7, #1, c1, c1, c1, #4
306 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xfe,0x81,0x17]
|
| /external/llvm/test/MC/ARM/ |
| D | arm_instructions.s | 72 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
73 cdp2 p7, #1, c1, c1, c1, #4
|
| D | basic-arm-instructions.s | 660 cdp2 p7, #1, c1, c1, c1, #4
661 cdp2 p12, #0, c6, c12, c0, #7
664 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x81,0x17,0x11,0xfe]
665 @ CHECK: cdp2 p12, #0, c6, c12, c0, #7 @ encoding: [0xe0,0x6c,0x0c,0xfe]
|
| D | basic-thumb2-instructions.s | 429 cdp2 p7, #1, c1, c1, c1, #4
432 @ CHECK: cdp2 p7, #1, c1, c1, c1, #4 @ encoding: [0x11,0xfe,0x81,0x17]
|
| /external/clang/test/CodeGen/ |
| D | builtins-arm.c | 152 void cdp2() { in cdp2() function
|
| /external/v8/src/arm/ |
| D | assembler-arm.h | 1037 void cdp2(Coprocessor coproc, int opcode_1,
|
| D | assembler-arm.cc | 2342 void Assembler::cdp2(Coprocessor coproc, int opcode_1, CRegister crd, in cdp2() function in v8::internal::Assembler
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 260 # CHECK: cdp2 p7, #1, c1, c1, c1, #4
|
| D | basic-arm-instructions.txt | 363 # CHECK: cdp2 p7, #1, c1, c1, c1, #4
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 3733 "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
|
| D | ARMInstrInfo.td | 4237 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 4292 "cdp2", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
|
| D | ARMInstrInfo.td | 4836 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
|