| /external/llvm/test/MC/ARM/ |
| D | gas-compl-copr-reg.s | 7 stc p14, cr6, [r2, #-224]
14 stc p14, cr6, [r2, #-224]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | cc.ll | 11 …ideeffect "sc", "={r0},={r3},{r0},~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" (i64 %a)
44 …sideeffect "sc", "={r0},={r3},{r0},~{cc},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}" (i64 %a)
|
| D | addisdtprelha-nonr3.mir | 63 …d %cr0, implicit-def dead %cr1, implicit-def dead %cr5, implicit-def dead %cr6, implicit-def dead …
67 …d %cr0, implicit-def dead %cr1, implicit-def dead %cr5, implicit-def dead %cr6, implicit-def dead …
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-regs.s | 83 #CHECK: .cfi_offset cr6, 626
199 .cfi_offset cr6,626
|
| D | ppc64-encoding-ext.s | 27 beqlr cr6
124 btlr 4*cr6+lt
127 btlr 4*cr6+gt
130 btlr 4*cr6+eq
133 btlr 4*cr6+so
136 btlr 4*cr6+un
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 104 bne cr6, LBB1_2 ; cond_next
|
| D | PPCRegisterInfo.td | 245 def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>;
|
| /external/valgrind/VEX/orig_ppc32/ |
| D | date.orig | 577 0x25471E38: 2B090002 cmpli cr6,r9,2
644 0x25471B70: 2F0B0000 cmpi cr6,r11,0
795 0x25471BC4: 2F090000 cmpi cr6,r9,0
967 0x25471C24: 2F070000 cmpi cr6,r7,0
2147 0x25471D40: 2F0A0016 cmpi cr6,r10,22
2223 0x25471D68: 2F000000 cmpi cr6,r0,0
4408 0x2547F3D8: 2F090000 cmpi cr6,r9,0
5216 0x2547F208: 2F080002 cmpi cr6,r8,2
5585 0x2547F264: 2F1FFFFF cmpi cr6,r31,-1
5979 0x2548045C: 2F1D0000 cmpi cr6,r29,0
[all …]
|
| D | return0.orig | 577 0x25471E38: 2B090002 cmpli cr6,r9,2
644 0x25471B70: 2F0B0000 cmpi cr6,r11,0
795 0x25471BC4: 2F090000 cmpi cr6,r9,0
967 0x25471C24: 2F070000 cmpi cr6,r7,0
2147 0x25471D40: 2F0A0016 cmpi cr6,r10,22
2223 0x25471D68: 2F000000 cmpi cr6,r0,0
4408 0x2547F3D8: 2F090000 cmpi cr6,r9,0
5216 0x2547F208: 2F080002 cmpi cr6,r8,2
5585 0x2547F264: 2F1FFFFF cmpi cr6,r31,-1
5979 0x2548045C: 2F1D0000 cmpi cr6,r29,0
[all …]
|
| /external/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 104 bne cr6, LBB1_2 ; cond_next
|
| D | PPCRegisterInfo.td | 200 def CR6 : CR<6, "cr6", [CR6LT, CR6GT, CR6EQ, CR6UN]>, DwarfRegNum<[74, 74]>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86RegisterInfo.td | 254 def CR6 : Register<"cr6">;
|
| D | X86GenAsmWriter.inc | 5431 "\000cr2\000cr3\000cr4\000cr5\000cr6\000cr7\000cr8\000cr9\000cr10\000cr1"
|
| D | X86GenAsmWriter1.inc | 6174 "\000cr2\000cr3\000cr4\000cr5\000cr6\000cr7\000cr8\000cr9\000cr10\000cr1"
|
| D | X86GenAsmMatcher.inc | 159 return 17; // "cr6"
|
| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 290 def CR6 : X86Reg<"cr6", 6>;
|
| /external/v8/src/ppc/ |
| D | assembler-ppc.h | 289 const CRegister cr6 = {6}; variable
|
| /external/v8/src/arm/ |
| D | assembler-arm.h | 436 const CRegister cr6 = { 6 }; variable
|
| /external/v8/src/s390/ |
| D | assembler-s390.h | 269 const CRegister cr6 = {6}; variable
|
| /external/v8/src/crankshaft/ppc/ |
| D | lithium-codegen-ppc.cc | 749 CRegister alt_cr = cr6; in DeoptimizeIf()
|
| /external/valgrind/perf/ |
| D | tinycc.c | 2960 DEF_ASM(cr6)
4292 DEF_ASM(cr6)
|