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Searched refs:csinv (Results 1 – 25 of 25) sorted by relevance

/external/llvm/test/CodeGen/AArch64/
Dcond-sel.ll107 ; CHECK: csinv {{w[0-9]+}}, [[LHS]], [[RHS]], ls
115 ; CHECK: csinv {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
124 ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
132 ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
152 ; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt
160 ; CHECK: csinv {{x[0-9]+}}, [[RHS3]], xzr, hi
Dfp16-v4-instructions.ll303 ; CHECK-DAG: csinv {{.*}}, [[REG1]], wzr, vc
304 ; CHECK-DAG: csinv {{.*}}, [[REG2]], wzr, vc
305 ; CHECK-DAG: csinv {{.*}}, [[REG3]], wzr, vc
306 ; CHECK-DAG: csinv {{.*}}, [[REG4]], wzr, vc
421 ; CHECK-DAG: csinv {{.*}}, [[REG1]], wzr, le
422 ; CHECK-DAG: csinv {{.*}}, [[REG2]], wzr, le
423 ; CHECK-DAG: csinv {{.*}}, [[REG3]], wzr, le
424 ; CHECK-DAG: csinv {{.*}}, [[REG4]], wzr, le
Darm64-early-ifcvt.ll114 ; CHECK-NEXT: csinv w0, w1, w0, eq
132 ; CHECK-NEXT: csinv x0, x1, x0, eq
150 ; CHECK-NEXT: csinv w0, w1, w0, ne
168 ; CHECK-NEXT: csinv x0, x1, x0, ne
Darm64-csel.ll104 ; CHECK: csinv w0, w1, w2, ne
/external/valgrind/none/tests/arm64/
Dinteger.stdout.exp867 cmp x17,x18 ; csinv x16,x17,x18,eq :: rd 8593c2e5aedb9b6a rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
868 cmp x17,x18 ; csinv x16,x17,x18,ne :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
869 cmp x17,x18 ; csinv x16,x17,x18,cc :: rd 8593c2e5aedb9b6a rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
870 cmp x17,x18 ; csinv x16,x17,x18,cs :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
871 cmp x17,x18 ; csinv x16,x17,x18,mi :: rd 8593c2e5aedb9b6a rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
872 cmp x17,x18 ; csinv x16,x17,x18,pl :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
873 cmp x17,x18 ; csinv x16,x17,x18,vc :: rd 8593c2e5aedb9b6a rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
874 cmp x17,x18 ; csinv x16,x17,x18,vs :: rd afa6ef803bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
900 cmp w17,w18 ; csinv w16,w17,w18,eq :: rd 00000000aedb9b6a rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
901 cmp w17,w18 ; csinv w16,w17,w18,ne :: rd 000000003bc9291c rm afa6ef803bc9291c, rn 7a6c3d1a51246495,…
[all …]
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s1365 csinv w1, w0, w19, ne
1366 csinv wzr, w5, w9, eq
1367 csinv w9, wzr, w30, gt
1368 csinv w1, w28, wzr, mi
1374 csinv x19, x23, x29, lt
1375 csinv xzr, x3, x4, ge
1376 csinv x5, xzr, x6, cs
1377 csinv x7, x8, xzr, cc
Darm64-arithmetic-encoding.s554 csinv w1, w2, w3, eq
555 csinv x1, x2, x3, eq
Dbasic-a64-diagnostics.s1366 csinv w20, wsp, wsp, mi
1367 csinv sp, x30, x29, le
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-arithmetic.txt520 # CHECK: csinv w1, w2, w3, eq
522 # CHECK: csinv x1, x2, x3, eq
Dbasic-a64-instructions.txt911 # CHECK: csinv w1, w0, w19, ne
912 # CHECK: csinv wzr, w5, w9, eq
913 # CHECK: csinv w9, wzr, w30, gt
914 # CHECK: csinv w1, w28, wzr, mi
915 # CHECK: csinv x19, x23, x29, lt
916 # CHECK: csinv xzr, x3, x4, ge
917 # CHECK: csinv x5, xzr, x6, hs
918 # CHECK: csinv x7, x8, xzr, lo
951 # CHECK: csinv x3, xzr, xzr, nv
984 # CHECK: csinv x1, x0, x0, al
[all …]
/external/v8/src/arm64/
Dassembler-arm64.cc1340 void Assembler::csinv(const Register& rd, in csinv() function in v8::internal::Assembler
1366 csinv(rd, zr, zr, NegateCondition(cond)); in csetm()
1378 csinv(rd, rn, rn, NegateCondition(cond)); in cinv()
Dmacro-assembler-arm64-inl.h515 csinv(rd, rn, rm, cond); in Csinv()
Dassembler-arm64.h1250 void csinv(const Register& rd,
Dmacro-assembler-arm64.cc395 csinv(rd, rn, zr, cond); in Csel()
/external/vixl/src/aarch64/
Dassembler-aarch64.cc652 void Assembler::csinv(const Register& rd, in csinv() function in vixl::aarch64::Assembler
678 csinv(rd, zr, zr, InvertCondition(cond)); in csetm()
690 csinv(rd, rn, rn, InvertCondition(cond)); in cinv()
Dmacro-assembler-aarch64.cc1354 masm->csinv(rd, left_register, zr, cond); in CselSubHelperRightSmallImmediate()
Dassembler-aarch64.h829 void csinv(const Register& rd,
Dmacro-assembler-aarch64.h1110 csinv(rd, rn, rm, cond); in Csinv()
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour78 0x~~~~~~~~~~~~~~~~ 5a83005d csinv w29, w2, w3, eq
79 0x~~~~~~~~~~~~~~~~ 5a83105d csinv w29, w2, w3, ne
80 0x~~~~~~~~~~~~~~~~ da8630a4 csinv x4, x5, x6, lo
81 0x~~~~~~~~~~~~~~~~ da8620a4 csinv x4, x5, x6, hs
Dlog-disasm78 0x~~~~~~~~~~~~~~~~ 5a83005d csinv w29, w2, w3, eq
79 0x~~~~~~~~~~~~~~~~ 5a83105d csinv w29, w2, w3, ne
80 0x~~~~~~~~~~~~~~~~ da8630a4 csinv x4, x5, x6, lo
81 0x~~~~~~~~~~~~~~~~ da8620a4 csinv x4, x5, x6, hs
Dlog-all226 0x~~~~~~~~~~~~~~~~ 5a83005d csinv w29, w2, w3, eq
228 0x~~~~~~~~~~~~~~~~ 5a83105d csinv w29, w2, w3, ne
230 0x~~~~~~~~~~~~~~~~ da8630a4 csinv x4, x5, x6, lo
232 0x~~~~~~~~~~~~~~~~ da8620a4 csinv x4, x5, x6, hs
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc132 __ csinv(w29, w2, w3, eq); in GenerateTestSequenceBase() local
133 __ csinv(w29, w2, w3, ne); in GenerateTestSequenceBase() local
134 __ csinv(x4, x5, x6, cc); in GenerateTestSequenceBase() local
135 __ csinv(x4, x5, x6, cs); in GenerateTestSequenceBase() local
Dtest-disasm-aarch64.cc2156 COMPARE(csinv(w12, w13, w14, mi), "csinv w12, w13, w14, mi"); in TEST()
2157 COMPARE(csinv(x15, x16, x17, pl), "csinv x15, x16, x17, pl"); in TEST()
2175 COMPARE(csinv(x4, x5, x6, al), "csinv x4, x5, x6, al"); in TEST()
2176 COMPARE(csinv(x5, x6, x7, nv), "csinv x5, x6, x7, nv"); in TEST()
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md433 void csinv(const Register& rd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1116 defm CSINV : CondSelectOp<1, 0b00, "csinv", not>;