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Searched refs:cvtss2si (Results 1 – 24 of 24) sorted by relevance

/external/swiftshader/third_party/LLVM/test/Transforms/ConstProp/
Dcalls.ll35 …%i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float undef, float undef, floa…
54 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
/external/llvm/test/Transforms/ConstProp/
Dcalls.ll184 …%i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 3.0, float undef, float undef, float…
202 …%i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float undef, float undef, floa…
224 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %fm) nounwind
245 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %fm) nounwind
266 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %fm) nounwind
374 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
/external/llvm/test/CodeGen/X86/
Dsse-intrinsics-fast-isel-x86_64.ll20 ; X64-NEXT: cvtss2si %xmm0, %rax
Dsse-intrinsics-x86.ll202 ; SSE-NEXT: cvtss2si %xmm0, %eax
209 %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; <i32> [#uses=1]
212 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
Dsse-intrinsics-fast-isel.ll695 ; X32-NEXT: cvtss2si %xmm0, %eax
700 ; X64-NEXT: cvtss2si %xmm0, %eax
702 %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
705 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
744 ; X32-NEXT: cvtss2si %xmm0, %eax
749 ; X64-NEXT: cvtss2si %xmm0, %eax
751 %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
Dstack-folding-fp-sse42.ll441 ;CHECK: cvtss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
443 %2 = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
446 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
452 ;CHECK: cvtss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
Dstack-folding-fp-avx1.ll674 %2 = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
677 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
Davx-intrinsics-x86.ll2513 %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; <i32> [#uses=1]
2516 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dvec_demanded_elts.ll48 %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03)
131 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>)
/external/valgrind/none/tests/x86/
Dinsn_sse.def53 cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
54 cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[57]
/external/valgrind/none/tests/amd64/
Dinsn_sse.def53 cvtss2si xmm.ps[12.34,56.78,43.21,87.65] r32.sd[99] => 1.sd[12]
54 cvtss2si m128.ps[56.78,12.34,87.65,43.21] r32.sd[99] => 1.sd[57]
/external/llvm/test/Transforms/InstCombine/
Dvec_demanded_elts.ll49 %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03)
132 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>)
/external/swiftshader/src/Reactor/
Dx86.hpp21 RValue<Int> cvtss2si(RValue<Float> val);
DNucleus.cpp4111 return x86::cvtss2si(cast); in RoundInt()
6941 RValue<Int> cvtss2si(RValue<Float> val) in cvtss2si() function
6944 llvm::Function *cvtss2si = Intrinsic::getDeclaration(module, Intrinsic::x86_sse_cvtss2si); in cvtss2si() local
6949 return RValue<Int>(Nucleus::createCall(cvtss2si, RValue<Float4>(vector).value)); in cvtss2si()
/external/elfutils/tests/
Dtestfile44.expect.bz21testfile44.o: elf32-elf_i386 2 3Disassembly of section .text: 4 5 0 ...
Dtestfile45.expect.bz21testfile45.o: elf64-elf_x86_64 2 3Disassembly of section .text: 4 5 0 ...
/external/elfutils/libcpu/defs/
Di386665 11110011,00001111,00101101,{Mod}{reg}{R_m}:cvtss2si {Mod}{R_m},{reg}
/external/llvm/lib/Target/X86/
DX86InstrSSE.td1720 ssmem, sse_load_f32, "cvtss2si",
1723 ssmem, sse_load_f32, "cvtss2si",
1727 ssmem, sse_load_f32, "cvtss2si",
1730 ssmem, sse_load_f32, "cvtss2si",
1766 def : InstAlias<"cvtss2si{l}\t{$src, $dst|$dst, $src}",
1768 def : InstAlias<"cvtss2si{l}\t{$src, $dst|$dst, $src}",
1774 def : InstAlias<"cvtss2si{q}\t{$src, $dst|$dst, $src}",
1776 def : InstAlias<"cvtss2si{q}\t{$src, $dst|$dst, $src}",
DX86InstrAVX512.td5126 X86cvts2si, "cvtss2si">,
5129 X86cvts2si, "cvtss2si">,
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Davx-intrinsics-x86.ll1484 %res = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0) ; <i32> [#uses=1]
1487 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrSSE.td1511 "cvtss2si{l}\t{$src, $dst|$dst, $src}">, XS,
1514 "cvtss2si\t{$src, $dst|$dst, $src}">, XS, VEX,
1526 "cvtss2si{l}\t{$src, $dst|$dst, $src}">, XS;
1528 "cvtss2si{q}\t{$src, $dst|$dst, $src}">, XS, REX_W;
DX86GenAsmWriter1.inc3967 "cvtss2si\t\000vcvttpd2dq\t\000vcvttpd2dqx\t\000vcvttpd2dqy\t\000vdivpd\t"
/external/mesa3d/src/mesa/x86/
Dassyntax.h1666 #define CVTSS2SI(a, b) cvtss2si P_ARG2(a, b)
/external/swiftshader/third_party/LLVM/include/llvm/
DIntrinsics.gen480 x86_sse_cvtss2si, // llvm.x86.sse.cvtss2si
1007 "llvm.x86.sse.cvtss2si",
2861 return Intrinsic::x86_sse_cvtss2si; // "86.sse.cvtss2si"
5662 case Intrinsic::x86_sse_cvtss2si: // llvm.x86.sse.cvtss2si
6774 case Intrinsic::x86_sse_cvtss2si: // llvm.x86.sse.cvtss2si