/external/valgrind/none/tests/x86/ |
D | insn_sse.def | 55 cvttps2pi xmm.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] => 1.sd[12,56] 56 cvttps2pi m128.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] => 1.sd[12,56]
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/external/valgrind/none/tests/amd64/ |
D | insn_sse.def | 55 cvttps2pi xmm.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] => 1.sd[12,56] 56 cvttps2pi m128.ps[12.34,56.78,1.11,2.22] mm.sd[1,2] => 1.sd[12,56]
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/external/swiftshader/third_party/LLVM/test/MC/X86/ |
D | x86-32-coverage.s | 903 cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 906 cvttps2pi %xmm5,%mm3 7166 cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 7170 cvttps2pi 0x45,%mm3 7174 cvttps2pi 0x7eed,%mm3 7178 cvttps2pi 0xbabecafe,%mm3 7182 cvttps2pi 0x12345678,%mm3 7186 cvttps2pi %xmm5,%mm3 16215 cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 16218 cvttps2pi 0x45,%mm3 [all …]
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/external/llvm/test/MC/X86/ |
D | x86-32-coverage.s | 5541 cvttps2pi 0xdeadbeef(%ebx,%ecx,8),%mm3 5545 cvttps2pi 0x45,%mm3 5549 cvttps2pi 0x7eed,%mm3 5553 cvttps2pi 0xbabecafe,%mm3 5557 cvttps2pi 0x12345678,%mm3 5561 cvttps2pi %xmm5,%mm3
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/external/swiftshader/src/Reactor/ |
D | x86.hpp | 23 RValue<Int2> cvttps2pi(RValue<Float4> val);
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D | Nucleus.cpp | 6960 RValue<Int2> cvttps2pi(RValue<Float4> val) in cvttps2pi() function 6963 llvm::Function *cvttps2pi = Intrinsic::getDeclaration(module, Intrinsic::x86_sse_cvttps2pi); in cvttps2pi() local 6965 return RValue<Int2>(Nucleus::createCall(cvttps2pi, val.value)); in cvttps2pi()
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/external/llvm/test/CodeGen/X86/ |
D | stack-folding-mmx.ll | 50 ;CHECK: cvttps2pi {{-?[0-9]*}}(%rsp), {{%mm[0-7]}} {{.*#+}} 16-byte Folded Reload 52 %2 = call x86_mmx @llvm.x86.sse.cvttps2pi(<4 x float> %a0) nounwind readnone 55 declare x86_mmx @llvm.x86.sse.cvttps2pi(<4 x float>) nounwind readnone
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrMMX.td | 378 f64mem, load, "cvttps2pi\t{$src, $dst|$dst, $src}",
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D | X86GenAsmMatcher.inc | 3324 { X86::MMX_CVTTPS2PIirr, "cvttps2pi", Convert__Reg1_1__Reg1_0, { MCK_FR32, MCK_VR64 }, 0}, 3325 { X86::MMX_CVTTPS2PIirm, "cvttps2pi", Convert__Reg1_1__Mem5_0, { MCK_Mem, MCK_VR64 }, 0},
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D | X86GenAsmWriter.inc | 3923 "pi2pd\t\000cvtpi2ps\t\000cvtps2pi\t\000cvttpd2pi\t\000cvttps2pi\t\000em"
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D | X86GenAsmWriter1.inc | 3896 "ps2pi\t\000cvttpd2pi\t\000cvttps2pi\t\000emms\000maskmovq\t\000movd\t\000"
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/external/llvm/lib/Target/X86/ |
D | X86InstrMMX.td | 589 f64mem, load, "cvttps2pi\t{$src, $dst|$dst, $src}",
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/external/elfutils/tests/ |
D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
/external/elfutils/libcpu/defs/ |
D | i386 | 662 00001111,00101100,{Mod}{mmxreg}{R_m}:cvttps2pi {Mod}{R_m},{mmxreg}
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/external/mesa3d/src/mesa/x86/ |
D | assyntax.h | 1667 #define CVTTPS2PI(a, b) cvttps2pi P_ARG2(a, b)
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/external/swiftshader/third_party/LLVM/include/llvm/ |
D | Intrinsics.gen | 483 x86_sse_cvttps2pi, // llvm.x86.sse.cvttps2pi 1010 "llvm.x86.sse.cvttps2pi", 3422 return Intrinsic::x86_sse_cvttps2pi; // "86.sse.cvttps2pi" 6174 case Intrinsic::x86_sse_cvttps2pi: // llvm.x86.sse.cvttps2pi 7497 case Intrinsic::x86_sse_cvttps2pi: // llvm.x86.sse.cvttps2pi
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