Home
last modified time | relevance | path

Searched refs:dag (Results 1 – 25 of 260) sorted by relevance

1234567891011

/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
25 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
32 class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
37 class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
42 class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
47 class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
52 class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
57 class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
/external/llvm/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
61 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr,
62 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> {
66 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormatsV60.td42 class CVI_VA_Resource<dag outs, dag ins, string asmstr,
43 list<dag> pattern = [], string cstr = "",
48 class CVI_VA_DV_Resource<dag outs, dag ins, string asmstr,
49 list<dag> pattern = [], string cstr = "",
54 class CVI_VX_Resource_long<dag outs, dag ins, string asmstr,
55 list<dag> pattern = [], string cstr = "",
60 class CVI_VX_Resource_late<dag outs, dag ins, string asmstr,
61 list<dag> pattern = [], string cstr = "",
66 class CVI_VX_Resource<dag outs, dag ins, string asmstr,
67 list<dag> pattern = [], string cstr = "",
[all …]
DHexagonInstrFormats.td79 class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern,
84 dag OutOperandList = outs;
85 dag InOperandList = ins;
210 class LDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
215 class LDInst2<dag outs, dag ins, string asmstr, list<dag> pattern = [],
219 class CONSTLDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
225 class LDInstPost<dag outs, dag ins, string asmstr, list<dag> pattern = [],
230 class LD0Inst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
235 class LD1Inst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
243 class STInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
[all …]
DHexagonInstrFormatsV4.td42 class InstDuplex<bits<4> iClass, list<dag> pattern = [],
49 dag OutOperandList = (outs);
50 dag InOperandList = (ins);
108 class NVInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
112 class NVInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
117 class NVInstPost_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
123 class NVInstPI_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
128 class NCJInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
133 class MEMInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
138 class MEMInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
[all …]
/external/llvm/lib/Target/MSP430/
DMSP430InstrFormats.td54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f,
60 dag OutOperandList = outs;
61 dag InOperandList = ins;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
93 dag outs, dag ins, string asmstr, list<dag> pattern>
97 dag outs, dag ins, string asmstr, list<dag> pattern>
101 dag outs, dag ins, string asmstr, list<dag> pattern>
105 dag outs, dag ins, string asmstr, list<dag> pattern>
109 dag outs, dag ins, string asmstr, list<dag> pattern>
113 dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430InstrFormats.td54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f,
60 dag OutOperandList = outs;
61 dag InOperandList = ins;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
93 dag outs, dag ins, string asmstr, list<dag> pattern>
97 dag outs, dag ins, string asmstr, list<dag> pattern>
101 dag outs, dag ins, string asmstr, list<dag> pattern>
105 dag outs, dag ins, string asmstr, list<dag> pattern>
109 dag outs, dag ins, string asmstr, list<dag> pattern>
113 dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrFormats.td119 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
129 dag OutOperandList = outs;
130 dag InOperandList = ins;
178 class PseudoI<dag oops, dag iops, list<dag> pattern>
183 class I<bits<8> o, Format f, dag outs, dag ins, string asm,
184 list<dag> pattern, Domain d = GenericDomain>
189 class Ii8 <bits<8> o, Format f, dag outs, dag ins, string asm,
190 list<dag> pattern, Domain d = GenericDomain>
195 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm,
196 list<dag> pattern>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrFormats.td45 class InstSystemZ<bits<16> op, Format f, dag outs, dag ins> : Instruction {
53 dag OutOperandList = outs;
54 dag InOperandList = ins;
57 class I8<bits<8> op, Format f, dag outs, dag ins, string asmstr,
58 list<dag> pattern>
67 class I12<bits<12> op, Format f, dag outs, dag ins, string asmstr,
68 list<dag> pattern>
77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr,
78 list<dag> pattern>
84 class RRI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrFormats.td14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
56 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
57 InstrItinClass itin, list<dag> pattern>
68 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
87 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
88 InstrItinClass itin, list<dag> pattern>
101 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
102 InstrItinClass itin, list<dag> pattern>
114 class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr,
115 InstrItinClass itin, list<dag> pattern>
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
68 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
103 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
104 InstrItinClass itin, list<dag> pattern>
115 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
132 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,
141 dag OOL, dag IOL, string asmstr>
153 dag OOL, dag IOL, string asmstr>
167 dag OOL, dag IOL, string asmstr>
181 dag OOL, dag IOL, string asmstr, InstrItinClass itin,
[all …]
/external/llvm/lib/Target/AVR/
DAVRInstrFormats.td15 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction
19 dag OutOperandList = outs;
20 dag InOperandList = ins;
26 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern>
35 class AVRInst32<dag outs, dag ins, string asmstr, list<dag> pattern>
51 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
68 class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
69 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern>
81 class FTST<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
82 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern>
[all …]
/external/llvm/lib/Target/Sparc/
DSparcInstrFormats.td10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern,
21 dag OutOperandList = outs;
22 dag InOperandList = ins;
37 class F2<dag outs, dag ins, string asmstr, list<dag> pattern,
49 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern,
59 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr,
60 list<dag> pattern, InstrItinClass itin = NoItinerary>
70 dag outs, dag ins, string asmstr, list<dag> pattern,
87 class F2_4<bits<3> cond, bit annul, bit pred, dag outs, dag ins,
88 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary>
[all …]
/external/llvm/lib/Target/X86/
DX86InstrFormats.td220 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
232 dag OutOperandList = outs;
233 dag InOperandList = ins;
335 class PseudoI<dag oops, dag iops, list<dag> pattern>
340 class I<bits<8> o, Format f, dag outs, dag ins, string asm,
341 list<dag> pattern, InstrItinClass itin = NoItinerary,
347 class Ii8 <bits<8> o, Format f, dag outs, dag ins, string asm,
348 list<dag> pattern, InstrItinClass itin = NoItinerary,
354 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm,
355 list<dag> pattern, InstrItinClass itin = NoItinerary>
[all …]
/external/llvm/lib/Target/ARM/
DARMInstrFormats.td262 class ARMInstAlias<string Asm, dag Result, bit EmitPriority = 0>
264 class tInstAlias<string Asm, dag Result, bit EmitPriority = 0>
266 class t2InstAlias<string Asm, dag Result, bit EmitPriority = 0>
268 class VFP2InstAlias<string Asm, dag Result, bit EmitPriority = 0>
270 class VFP2DPInstAlias<string Asm, dag Result, bit EmitPriority = 0>
272 class VFP3InstAlias<string Asm, dag Result, bit EmitPriority = 0>
274 class NEONInstAlias<string Asm, dag Result, bit EmitPriority = 0>
352 class AsmPseudoInst<string asm, dag iops, dag oops = (outs)>
363 class ARMAsmPseudo<string asm, dag iops, dag oops = (outs)>
365 class tAsmPseudo<string asm, dag iops, dag oops = (outs)>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrFormats.td224 class ARMInstAlias<string Asm, dag Result, bit Emit = 0b1>
226 class tInstAlias<string Asm, dag Result, bit Emit = 0b1>
228 class t2InstAlias<string Asm, dag Result, bit Emit = 0b1>
230 class VFP2InstAlias<string Asm, dag Result, bit Emit = 0b1>
232 class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1>
293 class PseudoInst<dag oops, dag iops, InstrItinClass itin, list<dag> pattern>
304 class ARMPseudoInst<dag oops, dag iops, int sz, InstrItinClass itin,
305 list<dag> pattern>
312 class tPseudoInst<dag oops, dag iops, int sz, InstrItinClass itin,
313 list<dag> pattern>
[all …]
/external/llvm/lib/Target/Mips/
DMips16InstrFormats.td36 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern,
55 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
72 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern,
82 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern,
92 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>:
103 class FI16<bits<5> op, dag outs, dag ins, string asmstr, list<dag> pattern,
118 class FRI16<bits<5> op, dag outs, dag ins, string asmstr,
119 list<dag> pattern, InstrItinClass itin>:
135 class FRR16<bits<5> _funct, dag outs, dag ins, string asmstr,
136 list<dag> pattern, InstrItinClass itin>:
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrFormats.td17 class SPUInstr<dag OOL, dag IOL, string asmstr, InstrItinClass itin>
29 class RRForm<bits<11> opcode, dag OOL, dag IOL, string asmstr,
30 InstrItinClass itin, list<dag> pattern>
46 class RRForm_1<bits<11> opcode, dag OOL, dag IOL, string asmstr,
47 InstrItinClass itin, list<dag> pattern>
54 class RRForm_2<bits<11> opcode, dag OOL, dag IOL, string asmstr,
55 InstrItinClass itin, list<dag> pattern>
64 class RRForm_3<bits<11> opcode, dag OOL, dag IOL, string asmstr,
65 InstrItinClass itin, list<dag> pattern>
71 class RRRForm<bits<4> opcode, dag OOL, dag IOL, string asmstr,
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcInstrFormats.td10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction {
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
29 class F2<dag outs, dag ins, string asmstr, list<dag> pattern>
40 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern>
49 class F2_2<bits<4> condVal, bits<3> op2Val, dag outs, dag ins, string asmstr,
50 list<dag> pattern> : F2<outs, ins, asmstr, pattern> {
65 class F3<dag outs, dag ins, string asmstr, list<dag> pattern>
78 class F3_1<bits<2> opVal, bits<6> op3val, dag outs, dag ins,
79 string asmstr, list<dag> pattern> : F3<outs, ins, asmstr, pattern> {
[all …]
/external/llvm/test/TableGen/
DDag.td9 dag d = (X1 N);
15 // CHECK-NEXT: dag d = (X1 13)
26 dag d = (X2 N);
27 dag e = (N X2);
33 // CHECK-NEXT: dag d = (X2 Y2)
34 // CHECK-NEXT: dag e = (Y2 X2)
38 // Complex dag operator (F.TheOp).
49 dag Dag1 = (somedef1 1);
50 dag Dag2 = (a 2);
51 dag Dag3 = (F.TheOp 2);
[all …]
/external/swiftshader/third_party/LLVM/test/TableGen/
DDag.td9 dag d = (X1 N);
15 // CHECK-NEXT: dag d = (X1 13)
26 dag d = (X2 N);
27 dag e = (N X2);
33 // CHECK-NEXT: dag d = (X2 Y2)
34 // CHECK-NEXT: dag e = (Y2 X2)
38 // Complex dag operator (F.TheOp).
49 dag Dag1 = (somedef1 1);
50 dag Dag2 = (a 2);
51 dag Dag3 = (F.TheOp 2);
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
DSIInstrInfo.td31 class InstSI <dag outs, dag ins, string asm, list<dag> pattern> :
42 class Enc32 <dag outs, dag ins, string asm, list<dag> pattern> :
48 class Enc64 <dag outs, dag ins, string asm, list<dag> pattern> :
54 class SIOperand <ValueType vt, dag opInfo>: Operand <vt> {
145 class MIMG <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
182 class MTBUF <bits<3> op, dag outs, dag ins, string asm, list<dag> pattern> :
221 class MUBUF <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
258 class SMRD <bits<5> op, dag outs, dag ins, string asm, list<dag> pattern> :
279 class SOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> :
292 class SOP2 <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeInstrFormats.td53 class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr,
54 list<dag> pattern, InstrItinClass itin> : Instruction {
69 dag OutOperandList = outs;
70 dag InOperandList = ins;
83 class MBlazePseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
90 class TA<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
91 list<dag> pattern, InstrItinClass itin> :
108 class TB<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
126 class TAR<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
127 list<dag> pattern, InstrItinClass itin> :
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinInstrFormats.td14 class InstBfin<dag outs, dag ins, string asmstr, list<dag> pattern>
20 dag OutOperandList = outs;
21 dag InOperandList = ins;
27 class F1<dag outs, dag ins, string asmstr, list<dag> pattern>
32 class F2<dag outs, dag ins, string asmstr, list<dag> pattern>
/external/llvm/lib/Target/AMDGPU/
DSIInstrFormats.td14 class InstSI <dag outs, dag ins, string asm = "",
15 list<dag> pattern = []> :
94 class PseudoInstSI<dag outs, dag ins, list<dag> pattern = []>
114 class VOPAnyCommon <dag outs, dag ins, string asm, list<dag> pattern> :
124 class VOPCCommon <dag ins, string asm, list<dag> pattern> :
132 class VOP1Common <dag outs, dag ins, string asm, list<dag> pattern> :
139 class VOP2Common <dag outs, dag ins, string asm, list<dag> pattern> :
146 class VOP3Common <dag outs, dag ins, string asm = "",
147 list<dag> pattern = [], bit HasMods = 0,
282 class SOP1 <dag outs, dag ins, string asm, list<dag> pattern> :
[all …]

1234567891011