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Searched refs:divd (Results 1 – 13 of 13) sorted by relevance

/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s476 # CHECK-BE: divd 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd2]
477 # CHECK-LE: divd 2, 3, 4 # encoding: [0xd2,0x23,0x43,0x7c]
478 divd 2, 3, 4
479 # CHECK-BE: divd. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xd3]
480 # CHECK-LE: divd. 2, 3, 4 # encoding: [0xd3,0x23,0x43,0x7c]
481 divd. 2, 3, 4
/external/valgrind/none/tests/ppc64/
Djm-int.stdout.exp-LE190 divd 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
191 divd 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
192 divd 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
193 divd 0000001cbe991def, 0000000000000000 => 0000000000000000 (00000000 00000000)
194 divd 0000001cbe991def, 0000001cbe991def => 0000000000000001 (00000000 00000000)
195 divd 0000001cbe991def, ffffffffffffffff => ffffffe34166e211 (00000000 00000000)
196 divd ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000 00000000)
197 divd ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)
198 divd ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
419 divd. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)
[all …]
Djm-int.stdout.exp190 divd 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
191 divd 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
192 divd 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
193 divd 0000001cbe991def, 0000000000000000 => 0000000000000000 (00000000 00000000)
194 divd 0000001cbe991def, 0000001cbe991def => 0000000000000001 (00000000 00000000)
195 divd 0000001cbe991def, ffffffffffffffff => ffffffe34166e211 (00000000 00000000)
196 divd ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000 00000000)
197 divd ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)
198 divd ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding.txt373 # CHECK: divd 2, 3, 4
376 # CHECK: divd. 2, 3, 4
Dppc64le-encoding.txt370 # CHECK: divd 2, 3, 4
373 # CHECK: divd. 2, 3, 4
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCSchedule.td155 // divd IntDivD
DPPCInstr64Bit.td439 "divd $rT, $rA, $rB", IntDivD,
/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc1416 __ divd(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
1438 ASSEMBLE_MODULO(divd, mulld); in AssembleArchInstruction()
/external/v8/src/ppc/
Dmacro-assembler-ppc.h89 #define Div divd
Dassembler-ppc.h931 void divd(Register dst, Register src1, Register src2, OEBit o = LeaveOE,
Dassembler-ppc.cc1533 void Assembler::divd(Register dst, Register src1, Register src2, OEBit o, in divd() function in v8::internal::Assembler
/external/v8/src/s390/
Dmacro-assembler-s390.h82 #define Div divd
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td666 "divd", "$rT, $rA, $rB", IIC_IntDivD,