Searched refs:dmuhu (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips64r6InstrInfo.td | 49 class DMUHU_MM64R6_ENC : POOL32S_ARITH_FM_MMR6<"dmuhu", 0b011011000>;
207 class DMUHU_MM64R6_DESC : MUL_MM64R6_DESC_BASE<"dmuhu", GPR64Opnd, II_DMUHU,
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| D | Mips64r6InstrInfo.td | 70 class DMUHU_DESC : MUL_R6_DESC_BASE<"dmuhu", GPR64Opnd, II_DMUHU, mulhu>;
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| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | mul.ll | 246 ; 64R6: dmuhu $[[T2:[0-9]+]], $5, $7
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| /external/llvm/test/MC/Mips/micromips64r6/ |
| D | valid.s | 269 dmuhu $3, $4, $5 # CHECK dmuhu $3, $4, $5 # encoding: [0x58,0xa4,0x18,0xd8]
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| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 115 0xdd 0x10 0x64 0x00 # CHECK: dmuhu $2, $3, $4
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| D | valid-mips64r6.txt | 28 0x00 0x64 0x10 0xdd # CHECK: dmuhu $2, $3, $4
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| /external/llvm/test/MC/Disassembler/Mips/micromips64r6/ |
| D | valid.txt | 265 0x58 0xa4 0x18 0xd8 # CHECK: dmuhu $3, $4, $5
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| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 755 void dmuhu(Register rd, Register rs, Register rt);
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| D | assembler-mips64.cc | 1640 void Assembler::dmuhu(Register rd, Register rs, Register rt) { in dmuhu() function in v8::internal::Assembler
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