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Searched refs:drotrv (Results 1 – 24 of 24) sorted by relevance

/external/valgrind/none/tests/mips64/
Drotate_swap.stdout.exp-mips64r244 drotrv :: in 0x2000ffffffffffff, out 0xffff2000ffffffff, SA 16
45 drotrv :: in 0xffff0000ffffffff, out 0xffffffff0000ffff, SA 16
46 drotrv :: in 0x2000ffffffffffff, out 0xff2000ffffffffff, SA 8
47 drotrv :: in 0x2000ffffffffffff, out 0xf2000fffffffffff, SA 4
48 drotrv :: in 0x2000ffffffffffff, out 0xf90007ffffffffff, SA 5
49 drotrv :: in 0x31415927ffffffff, out 0xffcc505649ffffff, SA 10
50 drotrv :: in 0x2000ffffffffffff, out 0xf2000fffffffffff, SA 4
51 drotrv :: in 0x2000ffffffffffff, out 0x2000ffffffffffff, SA 0
52 drotrv :: in 0xeeeeffffffffffff, out 0xffffeeeeffffffff, SA 16
53 drotrv :: in 0x2000ffffffffffff, out 0xfffffffe4001ffff, SA 31
[all …]
Dshift_instructions.stdout.exp-mips64r24097 drotrv $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb1f740b4
4098 drotrv $s0, $s1, $s2 :: rd 0x95eb5500000000, rs 0x12bd6aa, rt 0xa2a6ec661ba84121
4099 drotrv $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb5365d03
4100 drotrv $s0, $s1, $s2 :: rd 0xec705a5562600fd0, rs 0x7e876382d2ab13, rt 0x614d9b445f12236b
4101 drotrv $t0, $t1, $t2 :: rd 0x608edb8000000002, rs 0x9823b6e, rt 0xffffffffb8757bda
4102 drotrv $s0, $s1, $s2 :: rd 0x6b74d618a8879cbb, rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75
4103 drotrv $t0, $t1, $t2 :: rd 0x6a1936c80000, rs 0xd4326d9, rt 0xffffffffbcb4666d
4104 drotrv $s0, $s1, $s2 :: rd 0xdd6b5a97eeddd1b5, rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666
4105 drotrv $t0, $t1, $t2 :: rd 0x130476dc000000, rs 0x130476dc, rt 0xffffffffa2f33668
4106 drotrv $s0, $s1, $s2 :: rd 0xef6a04856181450c, rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17
[all …]
/external/llvm/test/MC/Mips/
Drotations64.s95 # CHECK-64R: drotrv $4, $4, $1 # encoding: [0x00,0x24,0x20,0x56]
102 # CHECK-64R: drotrv $4, $5, $4 # encoding: [0x00,0x85,0x20,0x56]
171 # CHECK-64R: drotrv $4, $4, $5 # encoding: [0x00,0xa4,0x20,0x56]
177 # CHECK-64R: drotrv $4, $5, $6 # encoding: [0x00,0xc5,0x20,0x56]
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Dmips64shift.ll68 ; CHECK: drotrv
78 ; CHECK: drotrv
/external/llvm/test/CodeGen/Mips/
Dmips64shift.ll70 ; ALL: drotrv
81 ; ALL: drotrv
/external/llvm/test/MC/Mips/mips64/
Dinvalid-mips64r2.s19 …drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips5/
Dinvalid-mips64r2.s18 …drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s100 …drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x…
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s100 …drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x…
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s100 …drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x…
/external/llvm/lib/Target/Mips/
DMicroMips64r6InstrInfo.td62 class DROTRV_MM64R6_ENC : POOL32S_3R_FM_MMR6<"drotrv", 0b011010000>;
262 class DROTRV_MM64R6_DESC : SHIFT_ROTATE_REG_MM64R6<"drotrv", II_DROTRV, rotr>;
DMips64InstrInfo.td169 def DROTRV : StdMMR6Rel, shift_rotate_reg<"drotrv", GPR64Opnd, II_DROTRV,
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-mips64r2-el.txt129 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
273 0x56 0xc0 0xb7 0x00 # CHECK: drotrv $24, $23, $5
Dvalid-mips64r2.txt90 0x00 0xb7 0xc0 0x56 # CHECK: drotrv $24, $23, $5
119 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMips64InstrInfo.td131 def DROTRV : LogicR_shift_rotate_reg64<0x16, 0x01, "drotrv", rotr>;
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s302 drotrv $3, $6, $4 # CHECK: drotrv $3, $6, $4 # encoding: [0x58,0xc4,0x18,0xd0]
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-mips64r5.txt87 0x00 0xb7 0xc0 0x56 # CHECK: drotrv $24, $23, $5
116 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
Dvalid-mips64r5-el.txt126 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-mips64r3.txt87 0x00 0xb7 0xc0 0x56 # CHECK: drotrv $24, $23, $5
116 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
Dvalid-mips64r3-el.txt126 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt291 0x58 0xc4 0x18 0xd0 # CHECK: drotrv $3, $6, $4
/external/v8/src/mips64/
Dassembler-mips64.h797 void drotrv(Register rd, Register rt, Register rs);
Dassembler-mips64.cc1884 void Assembler::drotrv(Register rd, Register rt, Register rs) { in drotrv() function in v8::internal::Assembler
Dmacro-assembler-mips64.cc1133 drotrv(rd, rs, rt.rm()); in Dror()