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Searched refs:ds_read2st64_b32 (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dds_read2st64.ll8 ; SI: ds_read2st64_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset1:1
27 ; SI: ds_read2st64_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:1 of…
47 ; SI: ds_read2st64_b32 v{{\[}}[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]{{\]}}, v{{[0-9]+}} offset0:255 …
67 ; SI-NOT: ds_read2st64_b32
87 ; SI-NOT: ds_read2st64_b32
103 ; SI-NOT: ds_read2st64_b32
Dshl_add_ptr.ll74 ; SI-NEXT: ds_read2st64_b32 {{v\[[0-9]+:[0-9]+\]}}, [[PTR]] offset0:1 offset1:9
/external/llvm/test/MC/AMDGPU/
Dds.s253 ds_read2st64_b32 v[8:9], v2 label
/external/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt174 # VI: ds_read2st64_b32 v[8:9], v2 ; encoding: [0x00,0x00,0x70,0xd8,0x02,0x00,0x00,0x08]
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td834 defm DS_READ2ST64_B32 : DS_1A_Off8_RET <0x38, "ds_read2st64_b32", VReg_64>;