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Searched refs:ds_sub_rtn_u32 (Results 1 – 6 of 6) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Datomic_load_sub.ll24 ; SI: ds_sub_rtn_u32
33 ; SI: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:20
Dlocal-atomics.ll110 ; GCN: ds_sub_rtn_u32
120 ; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
132 ; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[ONE]]
143 ; GCN: ds_sub_rtn_u32 v{{[0-9]+}}, v{{[0-9]+}}, [[ONE]] offset:16
Dshl_add_ptr.ll163 ; SI: ds_sub_rtn_u32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8
/external/llvm/test/MC/AMDGPU/
Dds.s165 ds_sub_rtn_u32 v8, v2, v4 label
/external/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt108 # VI: ds_sub_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x42,0xd8,0x02,0x04,0x00,0x08]
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td803 defm DS_SUB_RTN_U32 : DS_1A1D_RET <0x21, "ds_sub_rtn_u32", VGPR_32, "ds_sub_u32">;