Searched refs:ds_xor_rtn_b32 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/test/MC/AMDGPU/ |
| D | ds.s | 205 ds_xor_rtn_b32 v8, v2, v4 label
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | local-atomics.ll | 196 ; GCN: ds_xor_rtn_b32
206 ; GCN: ds_xor_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
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| D | shl_add_ptr.ll | 205 ; SI: ds_xor_rtn_b32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}} offset:8
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| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | ds_vi.txt | 138 # VI: ds_xor_rtn_b32 v8, v2, v4 ; encoding: [0x00,0x00,0x56,0xd8,0x02,0x04,0x00,0x08]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 813 defm DS_XOR_RTN_B32 : DS_1A1D_RET <0x2b, "ds_xor_rtn_b32", VGPR_32, "ds_xor_b32">;
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