| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-xfail.txt | 22 0x46 0x19 0x0f 0x3a # CHECK: c.seq.s $fcc7, $f1, $f25
23 0x46 0x39 0x6c 0x33 # CHECK: c.ueq.d $fcc4, $f13, $f25
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
32 0x46 0xcd 0xde 0x40 # CHECK: add.ps $f25, $f27, $f13
52 0x46 0xc0 0xcb 0xa0 # CHECK: cvt.s.pu $f14, $f25
55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
59 0x46 0xc9 0xcd 0x11 # CHECK: movt.ps $f20, $f25, $fcc2
67 0x4c 0x99 0x4e 0xf6 # CHECK: nmadd.ps $f27, $f4, $f9, $f25
68 0x4c 0xac 0xc8 0x30 # CHECK: nmadd.s $f0, $f5, $f25, $f12
72 0x46 0xde 0x4e 0x6c # CHECK: pll.ps $f25, $f9, $f30
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips3/ |
| D | invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips5-wrong-error.s | 10 add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
30 cvt.s.pu $f14,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
35 movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| D | valid-xfail-mips4.txt | 22 0x46 0x19 0x0f 0x3a # CHECK: c.seq.s $fcc7, $f1, $f25
23 0x46 0x39 0x6c 0x33 # CHECK: c.ueq.d $fcc4, $f13, $f25
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
32 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
36 0x4c 0xac 0xc8 0x30 # CHECK: nmadd.s $f0, $f5, $f25, $f12
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips5-wrong-error.s | 9 … add.ps $f25,$f27,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
37 … movt.ps $f20,$f25,$fcc2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 … nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 … pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 22 0x46 0x19 0x0f 0x3a # CHECK: c.seq.s $fcc7, $f1, $f25
23 0x46 0x39 0x6c 0x33 # CHECK: c.ueq.d $fcc4, $f13, $f25
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | vsx-spill.ll | 10 …4},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f2…
31 …4},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f2…
51 …4},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f2…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips32r2.s | 9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
13 …nmadd.s $f0,$f5,$f25,$f12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/math/ |
| D | fpu_asm.S | 24 stfd f25,pos+88(sp); \
44 lfd f25,pos+88(sp); \
|
| /external/llvm/test/CodeGen/Mips/ |
| D | no-odd-spreg-msa.ll | 26 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
60 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
90 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
118 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
|
| D | no-odd-spreg.ll | 24 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
48 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
|
| /external/llvm/test/CodeGen/Mips/cconv/ |
| D | callee-saved-float.ll | 28 …~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{…
66 ; O32-INV-NOT: sdc1 $f25,
85 ; N32-INV-NOT: sdc1 $f25,
98 ; N64-DAG: sdc1 [[F25:\$f25]], [[OFF25:[0-9]+]]($sp)
|
| /external/llvm/test/MC/ARM/ |
| D | symbol-variants.s | 83 .word f25(tlsdesc)
85 @ CHECK: 64 R_ARM_TLS_GOTDESC f25
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| D | valid.s | 6 abs.d $f7,$f25 # CHECK: encoding:
48 ceil.w.d $f11,$f25
104 madd.s $f1,$f31,$f19,$f25
128 movz.s $f25,$f7,$v1
151 nmadd.s $f0,$f5,$f25,$f12
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| D | valid.s | 6 abs.d $f7,$f25 # CHECK: encoding:
48 ceil.w.d $f11,$f25
105 madd.s $f1,$f31,$f19,$f25
129 movz.s $f25,$f7,$v1
152 nmadd.s $f0,$f5,$f25,$f12
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| D | valid.s | 6 abs.d $f7,$f25 # CHECK: encoding:
48 ceil.w.d $f11,$f25
104 madd.s $f1,$f31,$f19,$f25
128 movz.s $f25,$f7,$v1
151 nmadd.s $f0,$f5,$f25,$f12
|
| /external/libjpeg-turbo/simd/ |
| D | jsimd_mips_dspr2_asm.h | 84 #define f25 $f25 macro
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| D | valid.s | 6 abs.d $f7,$f25 # CHECK: encoding:
50 ceil.w.d $f11,$f25
172 madd.s $f1,$f31,$f19,$f25
198 movz.s $f25,$f7,$v1
219 nmadd.s $f0,$f5,$f25,$f12
237 round.l.s $f25,$f5
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| D | valid.s | 6 abs.d $f7,$f25 # CHECK: encoding:
50 ceil.w.d $f11,$f25
172 madd.s $f1,$f31,$f19,$f25
198 movz.s $f25,$f7,$v1
219 nmadd.s $f0,$f5,$f25,$f12
237 round.l.s $f25,$f5
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| D | valid.s | 6 abs.d $f7,$f25 # CHECK: encoding:
50 ceil.w.d $f11,$f25
173 madd.s $f1,$f31,$f19,$f25
199 movz.s $f25,$f7,$v1
220 nmadd.s $f0,$f5,$f25,$f12
238 round.l.s $f25,$f5
|
| /external/compiler-rt/lib/builtins/ppc/ |
| D | restFP.S | 34 lfd f25,-56(r1)
|
| D | saveFP.S | 32 stfd f25,-56(r1)
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-xfail-mips64r3.txt | 22 0x46 0x19 0x0f 0x3a # CHECK: c.seq.s $fcc7, $f1, $f25
23 0x46 0x39 0x6c 0x33 # CHECK: c.ueq.d $fcc4, $f13, $f25
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
|