/external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
D | valid-xfail-mips64r3.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
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/external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
D | valid-xfail-mips64r2.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
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/external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
D | valid-xfail-mips64r5.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 50 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20 62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 66 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 75 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
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/external/llvm/test/MC/Mips/mips2/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips4/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips3/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips5-wrong-error.s | 16 c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 27 c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 43 plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
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/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
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/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 37 0x46 0xda 0x10 0x3d # CHECK: c.nge.ps $f2, $f26 48 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 55 0x46 0xc0 0xd3 0xa0 # CHECK: cvt.s.pu $f14, $f26 56 0x46 0x20 0x36 0x8b # CHECK: floor.l.d $f26, $f6 66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24 69 0x46 0xdc 0xd0 0x2d # CHECK: plu.ps $f0, $f26, $f28 70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26 80 0x46 0xda 0x71 0x01 # CHECK: sub.ps $f4, $f14, $f26
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/external/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips5-wrong-error.s | 19 … c.nge.ps $f1,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 30 … c.un.ps $fcc4,$f2,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 45 … plu.ps $f1,$f26,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 46 … pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 48 … sub.ps $f5,$f14,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Disassembler/Mips/mips64/ |
D | valid-mips64-xfail.txt | 38 0x46 0xda 0x08 0x3d # CHECK: c.nge.ps $f1, $f26 49 0x46 0xda 0x14 0x31 # CHECK: c.un.ps $fcc4, $f2, $f26 53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20 73 0x46 0xdd 0xd0 0x6d # CHECK: plu.ps $f1, $f26, $f29 74 0x46 0xda 0xf2 0x6e # CHECK: pul.ps $f9, $f30, $f26 80 0x46 0xda 0x71 0x41 # CHECK: sub.ps $f5, $f14, $f26
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/external/llvm/test/CodeGen/PowerPC/ |
D | vsx-spill.ll | 10 …5},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f2… 31 …5},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f2… 51 …5},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f2…
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/external/linux-kselftest/tools/testing/selftests/powerpc/math/ |
D | fpu_asm.S | 25 stfd f26,pos+96(sp); \ 45 lfd f26,pos+96(sp); \
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/external/llvm/test/CodeGen/Mips/ |
D | no-odd-spreg-msa.ll | 26 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{… 60 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{… 90 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{… 118 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{…
|
D | no-odd-spreg.ll | 24 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{… 48 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{…
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/external/llvm/test/CodeGen/Mips/cconv/ |
D | callee-saved-float.ll | 28 …~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{… 60 ; O32-DAG: sdc1 [[F26:\$f26]], [[OFF26:[0-9]+]]($sp) 79 ; N32-DAG: sdc1 [[F26:\$f26]], [[OFF26:[0-9]+]]($sp) 99 ; N64-DAG: sdc1 [[F26:\$f26]], [[OFF26:[0-9]+]]($sp)
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/external/llvm/test/MC/ARM/ |
D | symbol-variants.s | 88 .word f26(PREL31)-. 90 @CHECK: 68 R_ARM_PREL31 f26
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/external/llvm/test/MC/Disassembler/Mips/mips1/ |
D | valid-mips1-el.txt | 34 0xa1 0x5e 0x80 0x46 # CHECK: cvt.d.w $f26, $f11 35 0xa0 0x46 0x20 0x46 # CHECK: cvt.s.d $f26, $f8 40 0x03 0xa7 0x3a 0x46 # CHECK: div.d $f28, $f20, $f26 77 0x87 0x96 0x20 0x46 # CHECK: neg.d $f26, $f18
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D | valid-mips1.txt | 85 0x46 0x20 0x46 0xa0 # CHECK: cvt.s.d $f26, $f8 88 0x46 0x20 0x96 0x87 # CHECK: neg.d $f26, $f18 94 0x46 0x3a 0xa7 0x03 # CHECK: div.d $f28, $f20, $f26 97 0x46 0x80 0x5e 0xa1 # CHECK: cvt.d.w $f26, $f11
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/external/libjpeg-turbo/simd/ |
D | jsimd_mips_dspr2_asm.h | 85 #define f26 $f26 macro
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/external/valgrind/none/tests/mips32/ |
D | MoveIns.c | 309 TESTINSNMOVE("mfc1 $t2, $f26", 36, f26, t2); in main() 338 TESTINSNMOVEt("mtc1 $t2, $f26", 38, f26, t2); in main() 367 TESTINSNMOVE1s("mov.s $f25, $f26", 36, f25, f26); in main() 395 TESTINSNMOVE1d("mov.d $f24, $f26", 56, f24, f26); in main() 396 TESTINSNMOVE1d("mov.d $f24, $f26", 64, f24, f26); in main()
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/external/compiler-rt/lib/builtins/ppc/ |
D | restFP.S | 35 lfd f26,-48(r1)
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D | saveFP.S | 33 stfd f26,-48(r1)
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/external/llvm/test/MC/Disassembler/Mips/mips2/ |
D | valid-mips2-el.txt | 41 0xa1 0x5e 0x80 0x46 # CHECK: cvt.d.w $f26, $f11 42 0xa0 0x46 0x20 0x46 # CHECK: cvt.s.d $f26, $f8 47 0x03 0xa7 0x3a 0x46 # CHECK: div.d $f28, $f20, $f26 91 0x87 0x96 0x20 0x46 # CHECK: neg.d $f26, $f18
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