| /external/llvm/test/MC/AArch64/ |
| D | neon-frsqrt-frecp.s | 23 frecps v3.4h, v8.4h, v12.4h
24 frecps v31.8h, v29.8h, v28.8h
25 frecps v31.4s, v29.4s, v28.4s
26 frecps v3.2s, v8.2s, v12.2s
27 frecps v17.2d, v15.2d, v13.2d
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| D | neon-scalar-recip.s | 9 frecps h21, h16, h13
10 frecps s21, s16, s13
11 frecps d22, d30, d21
|
| D | fullfp16-neon-neg.s | 172 frecps v3.4h, v8.4h, v12.4h
174 frecps v31.8h, v29.8h, v28.8h
282 frecps h21, h16, h13
|
| D | arm64-advsimd.s | 331 frecps.2s v0, v0, v0
402 ; CHECK: frecps.2s v0, v0, v0 ; encoding: [0x00,0xfc,0x20,0x0e]
464 frecps.4h v0, v0, v0
489 ; CHECK: frecps.4h v0, v0, v0 ; encoding: [0x00,0x3c,0x40,0x0e]
514 frecps.8h v0, v0, v0
539 ; CHECK: frecps.8h v0, v0, v0 ; encoding: [0x00,0x3c,0x40,0x4e]
|
| D | neon-diagnostics.s | 382 frecps v0.4s, v1.2d, v2.4s
383 frecps v0.8h, v1.8h, v2.8h
3889 frecps s21, s16, h13
3890 frecps d22, s30, d21
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsqrt.ll | 5 ;CHECK: frecps.2s
8 %tmp3 = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
14 ;CHECK: frecps.4s
17 %tmp3 = call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
23 ;CHECK: frecps.2d
26 %tmp3 = call <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
30 declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
31 declare <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
32 declare <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double>, <2 x double>) nounwind readnone
|
| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 3978 LogicVRegister Simulator::frecps(VectorFormat vform, in frecps() function in vixl::aarch64::Simulator
3993 LogicVRegister Simulator::frecps(VectorFormat vform, in frecps() function in vixl::aarch64::Simulator
3998 frecps<float>(vform, dst, src1, src2); in frecps()
4001 frecps<double>(vform, dst, src1, src2); in frecps()
|
| D | simulator-aarch64.h | 2748 LogicVRegister frecps(VectorFormat vform,
2752 LogicVRegister frecps(VectorFormat vform,
|
| D | simulator-aarch64.cc | 3338 frecps(vf, rd, rn, rm); in VisitNEON3Same()
4630 frecps(vf, rd, rn, rm); in VisitNEONScalar3Same()
|
| D | assembler-aarch64.h | 2319 void frecps(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | macro-assembler-aarch64.h | 2153 V(frecps, Frecps) \
|
| D | assembler-aarch64.cc | 2728 V(frecps, NEON_FRECPS, NEON_FRECPS_scalar) \
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 478 0x~~~~~~~~~~~~~~~~ 5e71ff4b frecps d11, d26, d17
479 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1
2339 0x~~~~~~~~~~~~~~~~ 4e7afcf6 frecps v22.2d, v7.2d, v26.2d
2340 0x~~~~~~~~~~~~~~~~ 0e22ff7f frecps v31.2s, v27.2s, v2.2s
2341 0x~~~~~~~~~~~~~~~~ 4e3bfcd2 frecps v18.4s, v6.4s, v27.4s
|
| D | log-disasm | 478 0x~~~~~~~~~~~~~~~~ 5e71ff4b frecps d11, d26, d17
479 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1
2339 0x~~~~~~~~~~~~~~~~ 4e7afcf6 frecps v22.2d, v7.2d, v26.2d
2340 0x~~~~~~~~~~~~~~~~ 0e22ff7f frecps v31.2s, v27.2s, v2.2s
2341 0x~~~~~~~~~~~~~~~~ 4e3bfcd2 frecps v18.4s, v6.4s, v27.4s
|
| D | log-all | 1091 0x~~~~~~~~~~~~~~~~ 5e71ff4b frecps d11, d26, d17
1093 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1
5981 0x~~~~~~~~~~~~~~~~ 4e7afcf6 frecps v22.2d, v7.2d, v26.2d
5983 0x~~~~~~~~~~~~~~~~ 0e22ff7f frecps v31.2s, v27.2s, v2.2s
5985 0x~~~~~~~~~~~~~~~~ 4e3bfcd2 frecps v18.4s, v6.4s, v27.4s
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 555 __ frecps(d11, d26, d17); in GenerateTestSequenceFP() local
556 __ frecps(s18, s27, s1); in GenerateTestSequenceFP() local
2691 __ frecps(v22.V2D(), v7.V2D(), v26.V2D()); in GenerateTestSequenceNEONFP() local
2692 __ frecps(v31.V2S(), v27.V2S(), v2.V2S()); in GenerateTestSequenceNEONFP() local
2693 __ frecps(v18.V4S(), v6.V4S(), v27.V4S()); in GenerateTestSequenceNEONFP() local
|
| D | test-simulator-aarch64.cc | 4103 DEFINE_TEST_NEON_3SAME_FP(frecps, Basic)
4167 DEFINE_TEST_NEON_3SAME_FP_SCALAR(frecps, Basic)
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 177 # CHECK: frecps v5.4s, v7.4s, v16.4s
1499 # CHECK: frecps s21, s16, s13
1500 # CHECK: frecps d22, d30, d21
|
| D | arm64-advsimd.txt | 314 # CHECK: frecps.2s v0, v0, v0
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 26625 frecps d2, d11, d29 3b81dae5b59bb8f0734fc5eacdb8df2a ccf43d40a85e3ed67caf5c2a2cb8c07a ea149ae99…
26626 frecps s2, s11, s29 102e3df61e1737b64773108a9a8cc505 1439d55511d528139f846ceb1c09a913 20aef836e…
26627 frecps v2.2d, v11.2d, v29.2d b37f5e362b59c6b62e7496a900ce685c c15051965460e8aaaba51c691b555486 …
26628 frecps v2.4s, v11.4s, v29.4s 2709a118a1b48a25ac673a3b43536de3 d4cf15783553a2cd242651986d736786 …
26629 frecps v2.2s, v11.2s, v29.2s 70616910427da6374460e135a7ee774e 5449856d78007bb08e1bef6c563485c8 …
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2396 void frecps(const VRegister& vd,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2981 defm FRECPS : SIMDThreeSameVectorFP<0,0,0b111,"frecps", int_aarch64_neon_frecps>;
3261 defm FRECPS : SIMDFPThreeScalar<0, 0, 0b111, "frecps", int_aarch64_neon_frecps>;
|