Searched refs:getFirstUnallocated (Results 1 – 18 of 18) sorted by relevance
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 232 unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const { in getFirstUnallocated() function
260 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs); in AllocateReg()
273 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs); in AllocateReg()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 332 unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const { in getFirstUnallocated() function
360 unsigned FirstUnalloc = getFirstUnallocated(Regs); in AllocateReg()
401 unsigned FirstUnalloc = getFirstUnallocated(Regs); in AllocateReg()
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| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.h | 88 unsigned FirstFree = State.getFirstUnallocated(RegList); in CC_X86_32_MCUInReg()
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| D | X86FastISel.cpp | 3273 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs); in fastLowerCall()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 210 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
251 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate()
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| D | ARMISelLowering.cpp | 3142 unsigned RBeginIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in StoreByValRegs()
3247 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1744 for (unsigned r = State.getFirstUnallocated(IntRegs, IntRegsSize); in CC_MipsO32()
1767 || State.getFirstUnallocated(F32Regs, FloatRegsSize) != ValNo; in CC_MipsO32()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 1539 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC_SVR4_Custom_AlignArgRegs()
1567 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC_SVR4_Custom_AlignFPArgRegs()
1777 FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs, in LowerFormalArguments_SVR4()
1779 FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs, in LowerFormalArguments_SVR4()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2493 State.getFirstUnallocated(F32Regs) != ValNo; in CC_MipsO32()
3872 unsigned Idx = State.getFirstUnallocated(ArgRegs); in writeVarArgRegs()
3938 FirstReg = State->getFirstUnallocated(IntArgRegs); in HandleByVal()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 308 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs, 6); in LowerFormalArguments()
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1150 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs, in LowerCCCArguments()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 1764 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs, 8); in DoSelectCall()
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| D | X86ISelLowering.cpp | 1869 NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs64Bit, TotalNumXMMRegs); in LowerFormalArguments()
1871 unsigned NumIntRegs = CCInfo.getFirstUnallocated(GPR64ArgRegs, in LowerFormalArguments()
2239 unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs, 8); in LowerCall()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1361 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs); in LowerCCCArguments()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2679 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs()
2707 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
3051 FuncInfo->setVarArgsNumGPR(CCInfo.getFirstUnallocated(GPArgRegs)); in LowerFormalArguments_32SVR4()
3052 FuncInfo->setVarArgsNumFPR(CCInfo.getFirstUnallocated(FPArgRegs)); in LowerFormalArguments_32SVR4()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 545 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs); in LowerFormalArguments_32()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 2406 firstUnalloced = CCInfo.getFirstUnallocated(GPRArgRegs, in computeRegArea()
2435 firstRegToSaveIndex = CCInfo.getFirstUnallocated in VarArgStyleRegisters()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2651 unsigned FirstVariadicGPR = CCInfo.getFirstUnallocated(GPRArgRegs); in saveVarArgRegisters()
2680 unsigned FirstVariadicFPR = CCInfo.getFirstUnallocated(FPRArgRegs); in saveVarArgRegisters()
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