Searched refs:getMemBase (Results 1 – 3 of 3) sorted by relevance
156 unsigned getMemBase() const { in getMemBase() function205 Inst.addOperand(MCOperand::CreateReg(getMemBase())); in addMemOperands()293 OS << getMBlazeRegisterNumbering(getMemBase()); in print()
264 unsigned getMemBase() const { in getMemBase() function in __anoncba7d3b40111::SparcOperand293 case k_MemoryReg: OS << "Mem: " << getMemBase() << "+" in print()296 OS << "Mem: " << getMemBase() in print()326 Inst.addOperand(MCOperand::createReg(getMemBase())); in addMEMrrOperands()335 Inst.addOperand(MCOperand::createReg(getMemBase())); in addMEMriOperands()
972 ? getMemBase()->getGPR64Reg() in addMemOperands()973 : getMemBase()->getGPR32Reg())); in addMemOperands()982 Inst.addOperand(MCOperand::createReg(getMemBase()->getGPRMM16Reg())); in addMicroMipsMemOperands()1068 if (!getMemBase()->isGPRAsmReg()) in isMemWithSimmOffset()1079 return isMem() && getMemBase()->isMM16AsmReg(); in isMemWithGRPMM16Base()1083 && getMemBase()->isRegIdx() && (getMemBase()->getGPR32Reg() == Mips::SP); in isMemWithUimmOffsetSP()1087 && (getConstantMemOff() % 4 == 0) && getMemBase()->isRegIdx() in isMemWithUimmWordAlignedOffsetSP()1088 && (getMemBase()->getGPR32Reg() == Mips::SP); in isMemWithUimmWordAlignedOffsetSP()1092 && (getConstantMemOff() % 4 == 0) && getMemBase()->isRegIdx() in isMemWithSimmWordAlignedOffsetGP()1093 && (getMemBase()->getGPR32Reg() == Mips::GP); in isMemWithSimmWordAlignedOffsetGP()[all …]