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Searched refs:i11 (Results 1 – 25 of 63) sorted by relevance

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/external/llvm/test/CodeGen/X86/
D2010-01-07-ISelBug.ll6 br label %if.end.i11
8 if.end.i11: ; preds = %lor.lhs.false.i10, %lor.lhs.false.i10,…
11 for.body161: ; preds = %if.end.i11
14 for.end197: ; preds = %for.body161, %if.end.i11
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
D2007-02-16-BranchFold.ll65 %tmp8.i11.i = load i32, i32* %tmp7.i10.i ; <i32> [#uses=7]
69 icmp slt i32 %tmp8.i11.i, 1 ; <i1>:0 [#uses=1]
73 icmp slt i32 %tmp8.i11.i, 2 ; <i1>:1 [#uses=1]
77 icmp eq i32 %tmp8.i11.i, 2 ; <i1>:2 [#uses=1]
81 icmp eq i32 %tmp8.i11.i, 1 ; <i1>:3 [#uses=1]
85 icmp slt i32 %tmp8.i11.i, 0 ; <i1>:4 [#uses=1]
89 icmp eq i32 %tmp8.i11.i, 0 ; <i1>:5 [#uses=1]
93 icmp eq i32 %tmp8.i11.i, -1 ; <i1>:6 [#uses=1]
D2008-09-09-LinearScanBug.ll15 br i1 false, label %forinc6.i.i25, label %forinc.i.i11
17 forinc.i.i11: ; preds = %forcond1.backedge.i.i20, %forcond1.preheader.i.i7
22 land_rhs3.i.i.i14: ; preds = %forinc.i.i11
25 lor_rhs.i.i.i17: ; preds = %land_rhs3.i.i.i14, %forinc.i.i11
33 br i1 %tobool3.i.i19, label %forinc6.i.i25, label %forinc.i.i11
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2010-01-07-ISelBug.ll6 br label %if.end.i11
8 if.end.i11: ; preds = %lor.lhs.false.i10, %lor.lhs.false.i10,…
11 for.body161: ; preds = %if.end.i11
14 for.end197: ; preds = %for.body161, %if.end.i11
15 %mlucEntry.4 = phi i96 [ undef, %for.body161 ], [ undef, %if.end.i11 ] ; <i96> [#uses=2]
D2007-02-16-BranchFold.ll65 %tmp8.i11.i = load i32* %tmp7.i10.i ; <i32> [#uses=7]
69 icmp slt i32 %tmp8.i11.i, 1 ; <i1>:0 [#uses=1]
73 icmp slt i32 %tmp8.i11.i, 2 ; <i1>:1 [#uses=1]
77 icmp eq i32 %tmp8.i11.i, 2 ; <i1>:2 [#uses=1]
81 icmp eq i32 %tmp8.i11.i, 1 ; <i1>:3 [#uses=1]
85 icmp slt i32 %tmp8.i11.i, 0 ; <i1>:4 [#uses=1]
89 icmp eq i32 %tmp8.i11.i, 0 ; <i1>:5 [#uses=1]
93 icmp eq i32 %tmp8.i11.i, -1 ; <i1>:6 [#uses=1]
D2008-09-09-LinearScanBug.ll15 br i1 false, label %forinc6.i.i25, label %forinc.i.i11
17 forinc.i.i11: ; preds = %forcond1.backedge.i.i20, %forcond1.preheader.i.i7
22 land_rhs3.i.i.i14: ; preds = %forinc.i.i11
25 lor_rhs.i.i.i17: ; preds = %land_rhs3.i.i.i14, %forinc.i.i11
33 br i1 %tobool3.i.i19, label %forinc6.i.i25, label %forinc.i.i11
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
D2010-06-19-ITBlockCrash.ll12 br i1 undef, label %bb.i.i10, label %bb1.i.i11
17 bb1.i.i11: ; preds = %bb11
24 isupper144.exit12: ; preds = %bb1.i.i11, %bb.i.i10
25 %4 = phi i8 [ %.pre, %bb1.i.i11 ], [ 0, %bb.i.i10 ] ; <i8> [#uses=1]
26 %5 = phi i32 [ %3, %bb1.i.i11 ], [ undef, %bb.i.i10 ] ; <i32> [#uses=1]
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/llvm/test/CodeGen/Thumb2/
D2010-06-19-ITBlockCrash.ll12 br i1 undef, label %bb.i.i10, label %bb1.i.i11
17 bb1.i.i11: ; preds = %bb11
24 isupper144.exit12: ; preds = %bb1.i.i11, %bb.i.i10
25 %4 = phi i8 [ %.pre, %bb1.i.i11 ], [ 0, %bb.i.i10 ] ; <i8> [#uses=1]
26 %5 = phi i32 [ %3, %bb1.i.i11 ], [ undef, %bb.i.i10 ] ; <i32> [#uses=1]
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
D2009-06-02-ISelCrash.ll45 br i1 undef, label %bb4.i11.i, label %bb1.outer2.i.i
47 bb4.i11.i: ; preds = %bb4.i11.i, %bb2.i9.i
48 br i1 undef, label %bb5.i12.i, label %bb4.i11.i
50 bb5.i12.i: ; preds = %bb4.i11.i
/external/llvm/test/Transforms/SimplifyCFG/
Dbranch-fold.ll27 %and.i11.i = and i64 %i1, 281474976710655
28 %or.cond = icmp eq i64 %and.i.i, %and.i11.i
44 %shr.i.i11 = lshr i64 %i0, 48
45 %and.i11.i12 = and i64 %shr.i.i11, 32767
46 %phitmp = icmp uge i64 %and.i14.i10, %and.i11.i12
/external/llvm/test/tools/llvm-nm/X86/
Dradix.s88 .type i11,@object # @i11
89 .globl i11 symbol
91 i11: label
93 .size i11, 4
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dapint-zext1.ll5 define i47 @test_sext_zext(i11 %A) {
6 %c1 = zext i11 %A to i39
9 ; CHECK: %c2 = zext i11 %A to i47
Dapint-shift.ll128 define i1 @test18(i11 %A) {
129 %B = lshr i11 %A, 10 ; <i11> [#uses=1]
130 %C = icmp eq i11 %B, 123 ; <i1> [#uses=1]
164 define i11 @test23(i44 %A) {
167 %D = trunc i44 %C to i11 ; <i8> [#uses=1]
168 ret i11 %D
/external/llvm/test/Transforms/InstCombine/
Dapint-zext1.ll5 define i47 @test_sext_zext(i11 %A) {
6 %c1 = zext i11 %A to i39
9 ; CHECK: %c2 = zext i11 %A to i47
Dapint-shift.ll179 define i1 @test18(i11 %A) {
180 %B = lshr i11 %A, 10 ; <i11> [#uses=1]
181 %C = icmp eq i11 %B, 123 ; <i1> [#uses=1]
227 define i11 @test23(i44 %A) {
230 %D = trunc i44 %C to i11 ; <i8> [#uses=1]
231 ret i11 %D
/external/llvm/test/CodeGen/ARM/
D2009-06-02-ISelCrash.ll45 br i1 undef, label %bb4.i11.i, label %bb1.outer2.i.i
47 bb4.i11.i: ; preds = %bb4.i11.i, %bb2.i9.i
48 br i1 undef, label %bb5.i12.i, label %bb4.i11.i
50 bb5.i12.i: ; preds = %bb4.i11.i
Dbfx.ll7 %t2 = trunc i32 %t1 to i11
8 %t3 = sext i11 %t2 to i32
16 %t2 = trunc i32 %t1 to i11
17 %t3 = zext i11 %t2 to i32
/external/llvm/test/CodeGen/AMDGPU/
Dsi-vector-hang.ll34 %arrayidx6.i11.i = getelementptr inbounds i8, i8 addrspace(1)* %in0, i64 6
35 %12 = load i8, i8 addrspace(1)* %arrayidx6.i11.i, align 1
58 %arrayidx6.i11.i9 = getelementptr inbounds i8, i8 addrspace(1)* %in1, i64 6
59 %28 = load i8, i8 addrspace(1)* %arrayidx6.i11.i9, align 1
64 …%vecinit5.i11 = shufflevector <8 x i8> %23, <8 x i8> %31, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i…
65 %cmp.i = icmp slt <8 x i8> %vecinit5.i, %vecinit5.i11
66 %cond.i = select <8 x i1> %cmp.i, <8 x i8> %vecinit5.i, <8 x i8> %vecinit5.i11
Dsdivrem24.ll291 %den.i11.0 = shl i32 %den, 21
293 %den.i11 = ashr i32 %den.i11.0, 21
294 %result = srem i32 %num.i24, %den.i11
310 %num.i11.0 = shl i32 %num, 21
312 %num.i11 = ashr i32 %num.i11.0, 21
314 %result = srem i32 %num.i11, %den.i24
/external/libvpx/libvpx/vp8/common/x86/
Dloopfilter_block_sse2_x86_64.asm185 %define i11 [spp + 2 * stride5]
226 movdqa xmm11, i11
242 movdqa xmm1, i11
250 movdqa xmm1, i11
255 movdqa i11, xmm1
344 %define i11 [rsp + 176]
533 movdqa i11, xmm13
565 movdqa xmm11, i11
581 movdqa xmm1, i11
589 movdqa xmm1, i11
[all …]
/external/llvm/test/Transforms/LoopVectorize/
Dnsw-crash.ll18 %cmp.i11 = icmp eq i32* %incdec.ptr.i, undef
19 br i1 %cmp.i11, label %while.end, label %while.body
/external/llvm/test/CodeGen/PowerPC/
Dctrloop-udivti3.ll19 %conv3.i11 = trunc i128 %div.i to i64
20 store i64 %conv3.i11, i64* undef, align 8

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