Searched refs:imad (Results 1 – 7 of 7) sorted by relevance
/external/llvm/test/CodeGen/NVPTX/ |
D | imad.ll | 3 ; CHECK: imad 4 define i32 @imad(i32 %a, i32 %b, i32 %c) {
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/external/mesa3d/src/gallium/state_trackers/d3d1x/d3d1xshader/defs/ |
D | opcodes.txt | 36 imad
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXInstrInfo.td | 623 def imad : SDNode<"NVPTXISD::IMAD", SDTIMAD>; 629 [(set Int16Regs:$dst, (imad Int16Regs:$a, Int16Regs:$b, Int16Regs:$c))]>; 634 [(set Int16Regs:$dst, (imad Int16Regs:$a, Int16Regs:$b, imm:$c))]>; 639 [(set Int16Regs:$dst, (imad Int16Regs:$a, imm:$b, Int16Regs:$c))]>; 644 [(set Int16Regs:$dst, (imad Int16Regs:$a, imm:$b, imm:$c))]>; 650 [(set Int32Regs:$dst, (imad Int32Regs:$a, Int32Regs:$b, Int32Regs:$c))]>; 655 [(set Int32Regs:$dst, (imad Int32Regs:$a, Int32Regs:$b, imm:$c))]>; 660 [(set Int32Regs:$dst, (imad Int32Regs:$a, imm:$b, Int32Regs:$c))]>; 665 [(set Int32Regs:$dst, (imad Int32Regs:$a, imm:$b, imm:$c))]>; 671 [(set Int64Regs:$dst, (imad Int64Regs:$a, Int64Regs:$b, Int64Regs:$c))]>; [all …]
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/external/swiftshader/src/Shader/ |
D | ShaderCore.hpp | 270 void imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2);
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D | PixelProgram.cpp | 176 case Shader::OPCODE_IMAD: imad(d, s0, s1, s2); break; in applyShader()
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D | VertexProgram.cpp | 221 case Shader::OPCODE_IMAD: imad(d, s0, s1, s2); break; in program()
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D | ShaderCore.cpp | 724 …void ShaderCore::imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &s… in imad() function in sw::ShaderCore
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