| /external/llvm/include/llvm/IR/ |
| D | CallSite.h | 78 bool isCall() const { return I.getInt(); } in isCall() function
224 return (*this)->op_end() - (isCall() ? 1 : 3); in data_operands_end()
247 return isCall() && cast<CallInst>(getInstruction())->isMustTailCall(); in isMustTailCall()
252 return isCall() && cast<CallInst>(getInstruction())->isTailCall(); in isTailCall()
257 return isCall() \
263 if (isCall()) \
281 if (isCall()) in isInlineAsm()
527 if (isCall()) in getOperandBundlesAsDefs()
594 if (isCall()) // Skip Callee in getCallee()
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| /external/swiftshader/third_party/LLVM/include/llvm/Support/ |
| D | CallSite.h | 74 bool isCall() const { return I.getInt(); } in isCall() function
158 return isCall() \
164 if (isCall()) \
252 if (isCall()) in getArgumentEndOffset()
259 if (isCall()) // Skip Callee in getCallee()
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| /external/llvm/lib/Target/X86/ |
| D | X86VZeroUpper.cpp | 132 if (MI.isCall() && MO.isRegMask() && !clobbersAllYmmRegs(MO)) in hasYmmReg()
146 assert(MI.isCall() && "Can only be called on call instructions."); in callClobbersAnyYmmReg()
188 bool IsControlFlow = MI.isCall() || MI.isReturn(); in processBasicBlock()
217 if (MI.isCall() && !callClobbersAnyYmmReg(MI)) in processBasicBlock()
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| D | X86PadShortFunction.cpp | 139 assert(ReturnLoc->isReturn() && !ReturnLoc->isCall() && in runOnMachineFunction()
194 if (MI.isReturn() && !MI.isCall()) { in cyclesUntilReturn()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCJITInfo.cpp | 49 static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){ in EmitBranchToAt() argument
54 AtI[0] = BUILD_B(Offset, isCall); // b/bl target in EmitBranchToAt()
59 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl in EmitBranchToAt()
67 AtI[6] = BUILD_BCTR(isCall); // bctr/bctrl in EmitBranchToAt()
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 47 virtual bool isCall(const MCInst &Inst) const { in isCall() function
48 return Info->get(Inst.getOpcode()).isCall(); in isCall()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrAnalysis.h | 50 virtual bool isCall(const MCInst &Inst) const { in isCall() function
51 return Info->get(Inst.getOpcode()).isCall(); in isCall()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86VZeroUpper.cpp | 66 assert(MI->getDesc().isCall() && "Isn't a call instruction"); in isCallToModuleFn()
98 if (MI->getDesc().isCall() && !isCallToModuleFn(MI)) { in processBasicBlock()
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| D | X86InstrControl.td | 136 let isCall = 1 in
178 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
210 let isCall = 1 in
242 let isCall = 1, isCodeGenOnly = 1 in
266 let isCall = 1, isCodeGenOnly = 1 in
277 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 194 assert((!MCID.isCall() && !MCID.isReturn()) && in delayHasHazard()
224 unsigned e = MCID.isCall() || MCID.isReturn() ? MCID.getNumOperands() : in insertDefsUses()
228 if (MCID.isCall()) in insertDefsUses()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiDelaySlotFiller.cpp | 202 assert((!MI->isCall() && !MI->isReturn()) && in delayHasHazard()
232 unsigned E = MI->isCall() || MI->isReturn() ? MCID.getNumOperands() in insertDefsUses()
252 if (MI->isCall() || MI->isReturn()) in insertDefsUses()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 311 return (MI->getDesc().isTerminator() || MI->getDesc().isCall()); in isControlFlow()
991 MJ->isCall() || MJ->isTerminator(); in cannotCoexistAsymm()
1052 if (I->isCall() || J->isCall()) in hasDeadDependence()
1092 if (MI->isCall() || HII->isDeallocRet(MI) || HII->isNewValueJump(MI)) in hasControlDependence()
1107 (J->isBranch() || J->isCall() || J->isBarrier()); in hasControlDependence()
1181 if (PI->isCall()) { in isLegalToPacketizeTogether()
1251 if (I->isCall() || I->isReturn() || HII->isTailCall(I)) { in isLegalToPacketizeTogether()
1309 if (isDirectJump(I) && !J->isBranch() && !J->isCall() && in isLegalToPacketizeTogether()
1415 if (DepType == SDep::Anti && J->isCall()) { in isLegalToPacketizeTogether()
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| D | HexagonInstrInfoV3.td | 24 let isCall = 1, hasSideEffects = 1, isPredicable = 1,
40 let isCall = 1, hasSideEffects = 1, isPredicated = 1,
69 let isCodeGenOnly = 1, isCall = 1, hasSideEffects = 1, Defs = VolatileV3.Regs in
72 let isCodeGenOnly = 1, isCall = 1, hasSideEffects = 1, Defs = [PC, R31, R6, R7, P0] in
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGSDNodes.cpp | 86 SU->isCall = Old->isCall; in Clone()
318 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall()) in BuildSchedUnits()
319 NodeSUnit->isCall = true; in BuildSchedUnits()
336 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall()) in BuildSchedUnits()
337 NodeSUnit->isCall = true; in BuildSchedUnits()
343 if (NodeSUnit->isCall) in BuildSchedUnits()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 160 (ExitMI->getDesc().isCall() || ExitMI->getDesc().isBarrier()); in AddSchedBarrierDeps()
246 SU->isCall = MCID.isCall(); in BuildSchedGraph()
401 if (SU->isCall) { in BuildSchedGraph()
402 while (!DefList.empty() && DefList.back()->isCall) in BuildSchedGraph()
422 if (MCID.isCall() || MI->hasUnmodeledSideEffects() || in BuildSchedGraph()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGSDNodes.cpp | 94 SU->isCall = Old->isCall; in Clone()
356 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall()) in BuildSchedUnits()
357 NodeSUnit->isCall = true; in BuildSchedUnits()
374 if (N->isMachineOpcode() && TII->get(N->getMachineOpcode()).isCall()) in BuildSchedUnits()
375 NodeSUnit->isCall = true; in BuildSchedUnits()
381 if (NodeSUnit->isCall) in BuildSchedUnits()
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| D | ScheduleDAGRRList.cpp | 644 if (SU->isCall) in AdvancePastStalls()
692 if (SU->isCall) { in EmitNode()
2406 if (left->isCall && right->isCallOp) { in BURRSort()
2410 if (right->isCall && left->isCallOp) { in BURRSort()
2420 if (left->isCall || right->isCall) { in BURRSort()
2460 if ((left->isCall && RPriority > 0) || (right->isCall && LPriority > 0)) in BURRSort()
2465 !(left->isCall || right->isCall)) { in BURRSort()
2530 if (left->isCall || right->isCall) in operator ()()
2596 if (left->isCall || right->isCall) in operator ()()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 328 if (MI.isCall()) in init()
340 assert(MI.isCall()); in setCallerSaved()
606 DSI->isCall()) { in runOnMachineBasicBlock()
662 assert((!CurrI->isCall() && !CurrI->isReturn() && !CurrI->isBranch()) && in searchRange()
730 if (DisableForwardSearch || !Slot->isCall()) in searchForward()
880 return (Candidate.isTerminator() || Candidate.isCall() || in terminateSearch()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrCall.td | 36 let Uses = [SP32, SP64], isCall = 1 in {
48 } // Uses = [SP32,SP64], isCall = 1
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ScheduleDAG.h | 254 bool isCall : 1; // Is a function call.
283 isVRegCycle(false), isCall(false), isCallOp(false), isTwoAddress(false),
297 isVRegCycle(false), isCall(false), isCallOp(false), isTwoAddress(false),
310 isVRegCycle(false), isCall(false), isCallOp(false), isTwoAddress(false),
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 65 bool isCall(const MCInst &MI, bool *IsIndirectCall) { in isCall() function in __anon39d610e60111::MipsNaClELFStreamer
171 if (isCall(Inst, &IsIndirectCall)) { in EmitInstruction()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ScheduleDAG.h | 277 bool isCall : 1; // Is a function call.
312 NumRegDefsLeft(0), Latency(0), isVRegCycle(false), isCall(false),
328 NumRegDefsLeft(0), Latency(0), isVRegCycle(false), isCall(false),
343 NumRegDefsLeft(0), Latency(0), isVRegCycle(false), isCall(false),
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| /external/swiftshader/src/Shader/ |
| D | Shader.cpp | 1083 bool Shader::Instruction::isCall() const in isCall() function in sw::Shader::Instruction
1502 if(instruction[i]->isCall()) in optimizeCall()
1677 if(instruction[i]->isCall()) in analyzeDynamicBranching()
1702 if(instruction[i]->isCall()) in analyzeDynamicBranching()
1727 if(instruction[i]->isCall()) in analyzeDynamicBranching()
1747 if(instruction[i]->isCall()) in analyzeDynamicBranching()
1773 else if(instruction[i]->isCall()) in markFunctionAnalysis()
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| /external/llvm/lib/Analysis/ |
| D | LazyCallGraph.cpp | 234 if (!E.isCall()) in verify()
266 assert(!SourceN[TargetN].isCall() && "Must start with a ref edge!"); in switchInternalEdgeToCall()
410 if (!E.isCall()) in switchInternalEdgeToCall()
483 assert(SourceN[TargetN].isCall() && "Must start with a call edge!"); in switchInternalEdgeToRef()
674 assert(!SourceN[TargetN].isCall() && "Must start with a ref edge!"); in switchOutgoingEdgeToCall()
694 assert(SourceN[TargetN].isCall() && "Must start with a call edge!"); in switchOutgoingEdgeToRef()
962 assert(!SourceN[TargetN].isCall() && in removeInternalRefEdge()
1521 OS << " " << (E.isCall() ? "call" : "ref ") << " -> " in printNode()
1570 if (!E.isCall()) // It is a ref edge. in printNodeDOT()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMOptimizeBarriersPass.cpp | 49 MI->isCall() || in CanMovePastDMB()
|