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Searched refs:isFP64bit (Results 1 – 17 of 17) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSubtarget.cpp97 if (hasMSA() && !isFP64bit()) in MipsSubtarget()
111 assert(isFP64bit()); in MipsSubtarget()
DMipsRegisterInfo.cpp118 if (Subtarget.isFP64bit()) in getCalleeSavedRegs()
140 if (Subtarget.isFP64bit()) in getCallPreservedMask()
186 if (Subtarget.isFP64bit()) { in getReservedRegs()
DMipsCallingConv.td104 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCAssignToReg<[D0_64, D2_64]>>>,
105 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()", CCAssignToReg<[D0, D1]>>>
112 CCIfSubtargetNot<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP32>>,
113 CCIfSubtarget<"isFP64bit()", CCDelegateTo<CC_MipsO32_FP64>>
219 CCIfType<[f64], CCIfSubtargetNot<"isFP64bit()",
222 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"useOddSPReg()",
229 CCIfType<[f64], CCIfSubtarget<"isFP64bit()", CCIfSubtarget<"noOddSPReg()",
DMipsSubtarget.h223 bool isFP64bit() const { return IsFP64bit; } in isFP64bit() function
DMipsSEInstrInfo.cpp626 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg())); in expandExtractElementF64()
677 assert(!(Subtarget.isFP64bit() && !Subtarget.useOddSPReg())); in expandBuildPairF64()
DMipsSEFrameLowering.cpp291 !Subtarget.isFP64bit()); in expandBuildPairF64()
354 !Subtarget.isFP64bit()); in expandExtractElementF64()
DMipsInstrFPU.td60 def IsFP64bit : Predicate<"Subtarget->isFP64bit()">,
62 def NotFP64bit : Predicate<"!Subtarget->isFP64bit()">,
DMipsSEISelLowering.cpp107 if (Subtarget.isFP64bit()) in MipsSETargetLowering()
183 assert(Subtarget.isFP64bit() && "FR=1 is required for MIPS32r6"); in MipsSETargetLowering()
3102 assert(Subtarget.isFP64bit()); in emitCOPY_FD()
3167 assert(Subtarget.isFP64bit()); in emitINSERT_FD()
3358 assert(Subtarget.isFP64bit()); in emitFILL_FD()
DMipsAsmPrinter.cpp720 if (ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit())) in EmitStartOfAsmFile()
DMipsSEISelDAGToDAG.cpp756 } else if (Subtarget->isFP64bit()) { in trySelect()
DMipsFastISel.cpp213 UnsupportedFPMode = Subtarget->isFP64bit(); in MipsFastISel()
DMipsISelLowering.cpp3481 VT = (Subtarget.isFP64bit() || !(Reg % 2)) ? MVT::f64 : MVT::f32; in parseRegForInlineAsmConstraint()
3537 if (Subtarget.isFP64bit()) in getRegForInlineAsmConstraint()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIFlagsSection.h140 CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32; in setCPR1SizeFromPredicates()
178 else if (P.isFP64bit()) in setFpAbiFromPredicates()
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsSubtarget.h115 bool isFP64bit() const { return IsFP64bit; } in isFP64bit() function
DMipsInstrFPU.td57 def IsFP64bit : Predicate<"Subtarget.isFP64bit()">;
58 def NotFP64bit : Predicate<"!Subtarget.isFP64bit()">;
DMipsISelLowering.cpp2561 if ((!Subtarget->isSingleFloat()) && (!Subtarget->isFP64bit())) in getRegForInlineAsmConstraint()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp449 bool isFP64bit() const { in isFP64bit() function in __anond0efcad40211::MipsAsmParser