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Searched refs:kOutputs_Shadd16_RdIsRm_al_r10_r4_r10 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-a32-shadd16.h3380 const Inputs kOutputs_Shadd16_RdIsRm_al_r10_r4_r10[] = { variable
9004 ARRAY_SIZE(kOutputs_Shadd16_RdIsRm_al_r10_r4_r10),
9005 kOutputs_Shadd16_RdIsRm_al_r10_r4_r10,
Dsimulator-cond-rd-rn-rm-t32-shadd16.h3380 const Inputs kOutputs_Shadd16_RdIsRm_al_r10_r4_r10[] = { variable
9004 ARRAY_SIZE(kOutputs_Shadd16_RdIsRm_al_r10_r4_r10),
9005 kOutputs_Shadd16_RdIsRm_al_r10_r4_r10,