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Searched refs:kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-a32-shsax.h6814 const Inputs kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4[] = { variable
9072 ARRAY_SIZE(kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4),
9073 kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4,
Dsimulator-cond-rd-rn-rm-t32-shsax.h6814 const Inputs kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4[] = { variable
9072 ARRAY_SIZE(kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4),
9073 kOutputs_Shsax_RdIsNotRnIsNotRm_al_r14_r3_r4,