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Searched refs:kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-t32-shsub16.h391 const Inputs kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3[] = { variable
8908 ARRAY_SIZE(kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3),
8909 kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3,
Dsimulator-cond-rd-rn-rm-a32-shsub16.h391 const Inputs kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3[] = { variable
8908 ARRAY_SIZE(kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3),
8909 kOutputs_Shsub16_RdIsRnIsRm_al_r3_r3_r3,