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Searched refs:kQRegSizeInBytes (Results 1 – 11 of 11) sorted by relevance

/external/vixl/test/aarch64/
Dtest-utils-aarch64.h68 VIXL_ASSERT(sizeof(dump_.q_[0]) == kQRegSizeInBytes); in RegisterDump()
Dtest-utils-aarch64.cc466 MemOperand(dump, i * kQRegSizeInBytes)); in Dump()
Dtest-simulator-aarch64.cc1571 __ Str(vdstr, MemOperand(out, kQRegSizeInBytes, PostIndex)); in Test1OpAcrossNEON_Helper()
Dtest-assembler-aarch64.cc16424 offset += 2 * kQRegSizeInBytes; in TEST()
16641 preindex = 2 * kQRegSizeInBytes; in TEST()
16810 postindex = 2 * kQRegSizeInBytes; in TEST()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h356 typedef SimRegisterBase<kQRegSizeInBytes> SimVRegister; // v0-v31
534 for (unsigned i = size; i < kQRegSizeInBytes; i++) { in ClearForWrite()
655 Saturation saturated_[kQRegSizeInBytes];
658 bool round_[kQRegSizeInBytes];
1069 uint8_t val[kQRegSizeInBytes];
1078 (sizeof(T) == kQRegSizeInBytes)); in ReadVRegister()
1183 (sizeof(value) == kQRegSizeInBytes));
1593 int bytes = kQRegSizeInBytes,
Dassembler-aarch64.h198 (size_ == kQRegSizeInBytes)); in GetSize()
204 VIXL_ASSERT(size_ == kQRegSizeInBytes); in GetRawValue128Low64()
212 VIXL_ASSERT(size_ == kQRegSizeInBytes); in GetRawValue128High64()
305 : RawLiteral(kQRegSizeInBytes, literal_pool, ownership) { in RawLiteral() argument
306 VIXL_STATIC_ASSERT(sizeof(low64) == (kQRegSizeInBytes / 2)); in RawLiteral()
354 VIXL_ASSERT(GetSize() == kQRegSizeInBytes); in RewriteValueInCode()
Dinstructions-aarch64.h77 const unsigned kQRegSizeInBytes = kQRegSize / 8; variable
Dsimulator-aarch64.cc481 case kQRegSizeInBytes: in GetPrintRegisterFormatForSize()
494 case kQRegSizeInBytes: in GetPrintRegisterFormatForSize()
718 int byte = kQRegSizeInBytes - 1; in PrintVRegisterRawHelper()
759 VIXL_ASSERT(msb <= kQRegSizeInBytes); in PrintVRegisterFPHelper()
773 if (msb < (kQRegSizeInBytes - 1)) { in PrintVRegisterFPHelper()
Ddisasm-aarch64.cc4192 : kQRegSizeInBytes; in SubstituteRegisterField()
Dassembler-aarch64.cc142 VIXL_ASSERT(literal->GetSize() == kQRegSizeInBytes); in place()
1805 VIXL_ASSERT(lane < (kQRegSizeInBytes / lane_size)); in LoadStoreStructSingle()
/external/vixl/src/aarch32/
Dconstants-aarch32.h55 const unsigned kQRegSizeInBytes = kQRegSizeInBits / 8; variable