/external/llvm/test/MC/ARM/ |
D | load-store-acquire-release-v8.s | 4 ldaexh r2, [r5] 9 @ CHECK: ldaexh r2, [r5] @ encoding: [0x9f,0x2e,0xf5,0xe1]
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D | load-store-acquire-release-v8-thumb.s | 4 ldaexh r2, [r5] 9 @ CHECK: ldaexh r2, [r5] @ encoding: [0xd5,0xe8,0xdf,0x2f]
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D | thumbv8m.s | 124 ldaexh r1, [r2] label
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/external/llvm/test/MC/Disassembler/ARM/ |
D | load-store-acquire-release-v8.txt | 7 # CHECK: ldaexh r1, [r12] @ encoding: [0x9f,0x1e,0xfc,0xe1]
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D | load-store-acquire-release-v8-thumb.txt | 8 # CHECK: ldaexh r2, [r5] @ encoding: [0xd5,0xe8,0xdf,0x2f]
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/external/llvm/test/CodeGen/ARM/ |
D | ldaex-stlex.ll | 45 ; CHECK: ldaexh r0, [r0]
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D | atomic-ops-v8.ll | 43 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]] 522 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]] 728 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]] 841 ; CHECK: ldaexh r[[OLD:[0-9]+]], {{.*}}[[ADDR]] 1076 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2247 void ldaexh(Condition cond, Register rt, const MemOperand& operand); 2248 void ldaexh(Register rt, const MemOperand& operand) { in ldaexh() function 2249 ldaexh(al, rt, operand); in ldaexh()
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D | disasm-aarch32.h | 655 void ldaexh(Condition cond, Register rt, const MemOperand& operand);
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D | assembler-aarch32.cc | 4346 void Assembler::ldaexh(Condition cond, Register rt, const MemOperand& operand) { in ldaexh() function in vixl::aarch32::Assembler 4368 Delegate(kLdaexh, &Assembler::ldaexh, cond, rt, operand); in ldaexh()
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D | disasm-aarch32.cc | 1603 void Disassembler::ldaexh(Condition cond, in ldaexh() function in vixl::aarch32::Disassembler 10530 ldaexh(CurrentCond(), in DecodeT32() 60831 ldaexh(condition, in DecodeA32()
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D | macro-assembler-aarch32.h | 1978 ldaexh(cond, rt, operand); in Ldaexh()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 3318 "ldaexh", "\t$Rt, $addr", "",
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D | ARMInstrInfo.td | 4702 NoItinerary, "ldaexh", "\t$Rt, $addr",
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