Searched refs:lhr (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/test/CodeGen/SystemZ/ |
| D | swift-return.ll | 11 ; CHECK-DAG: lhr %r2, %r2
17 ; CHECK-O0-DAG: lhr %[[REG1:r[0-9]+]], %r2
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| D | int-conv-05.ll | 8 ; CHECK: lhr %r2, %r2
18 ; CHECK: lhr %r2, %r2
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| /external/v8/src/s390/ |
| D | assembler-s390.h | 844 void lhr(Register r1, Register r2);
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| D | assembler-s390.cc | 1515 void Assembler::lhr(Register r1, Register r2) { rre_form(LHR, r1, r2); } in lhr() function in v8::internal::Assembler
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| /external/v8/src/compiler/s390/ |
| D | code-generator-s390.cc | 1771 __ lhr(i.OutputRegister(), i.InputRegister(0)); in AssembleArchInstruction() local
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.td | 357 "lhr\t{$dst, $src}",
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| /external/llvm/test/MC/SystemZ/ |
| D | insn-good.s | 6245 #CHECK: lhr %r0, %r15 # encoding: [0xb9,0x27,0x00,0x0f]
6246 #CHECK: lhr %r7, %r8 # encoding: [0xb9,0x27,0x00,0x78]
6247 #CHECK: lhr %r15, %r0 # encoding: [0xb9,0x27,0x00,0xf0]
6249 lhr %r0, %r15
6250 lhr %r7, %r8
6251 lhr %r15, %r0
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| /external/valgrind/docs/internals/ |
| D | s390-opcodes.csv | 650 lhr,"load halfword 32",implemented,
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| /external/llvm/test/MC/Disassembler/SystemZ/ |
| D | insns.txt | 4630 # CHECK: lhr %r0, %r15
4633 # CHECK: lhr %r7, %r8
4636 # CHECK: lhr %r15, %r0
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