Searched refs:list_2 (Results 1 – 4 of 4) sorted by relevance
| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.h | 493 const RegisterList& list_2) {
494 return RegisterList(list_1.list_ | list_2.list_);
497 const RegisterList& list_2,
499 return Union(list_1, Union(list_2, list_3));
502 const RegisterList& list_2,
505 return Union(Union(list_1, list_2), Union(list_3, list_4));
508 const RegisterList& list_2) {
509 return RegisterList(list_1.list_ & list_2.list_);
512 const RegisterList& list_2,
514 return Intersection(list_1, Intersection(list_2, list_3));
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| /external/vixl/src/aarch64/ |
| D | operands-aarch64.cc | 90 const CPURegList& list_2, in Union() argument
92 return Union(list_1, Union(list_2, list_3)); in Union()
97 const CPURegList& list_2, in Union() argument
100 return Union(Union(list_1, list_2), Union(list_3, list_4)); in Union()
105 const CPURegList& list_2, in Intersection() argument
107 return Intersection(list_1, Intersection(list_2, list_3)); in Intersection()
112 const CPURegList& list_2, in Intersection() argument
115 return Intersection(Intersection(list_1, list_2), in Intersection()
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| D | operands-aarch64.h | 606 static CPURegList Union(const CPURegList& list_1, const CPURegList& list_2) { in Union() argument
607 VIXL_ASSERT(list_1.type_ == list_2.type_); in Union()
608 VIXL_ASSERT(list_1.size_ == list_2.size_); in Union()
609 return CPURegList(list_1.type_, list_1.size_, list_1.list_ | list_2.list_); in Union()
612 const CPURegList& list_2,
615 const CPURegList& list_2,
620 const CPURegList& list_2) { in Intersection() argument
621 VIXL_ASSERT(list_1.type_ == list_2.type_); in Intersection()
622 VIXL_ASSERT(list_1.size_ == list_2.size_); in Intersection()
623 return CPURegList(list_1.type_, list_1.size_, list_1.list_ & list_2.list_); in Intersection()
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 13708 CPURegList list_2(x11, x12, x13, x14); in TEST() local
13715 __ PeekCPURegList(list_2, 2 * kXRegSizeInBytes); in TEST()
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