Searched refs:llhr (Results 1 – 11 of 11) sorted by relevance
/external/llvm/test/CodeGen/SystemZ/ |
D | cmpxchg-05.ll | 20 ; CHECK-NOT: llhr 23 ; CHECK-NOT: llhr 46 ; CHECK-NOT: llhr 49 ; CHECK-NOT: llhr
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D | int-conv-06.ll | 9 ; CHECK: llhr %r2, %r2 19 ; CHECK: llhr %r2, %r2 29 ; CHECK: llhr %r2, %r2
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D | ctpop-01.ll | 24 ; CHECK: llhr %r0, %r2
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D | and-02.ll | 89 ; CHECK: llhr %r2, %r3
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D | asm-18.ll | 220 ; CHECK-DAG: llhr [[REG2:%r[0-5]]], %r3
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/external/v8/src/s390/ |
D | assembler-s390.h | 871 void llhr(Register r1, Register r2);
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D | assembler-s390.cc | 1614 void Assembler::llhr(Register r1, Register r2) { rre_form(LLHR, r1, r2); } in llhr() function in v8::internal::Assembler
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D | macro-assembler-s390.cc | 4827 llhr(dst, src); in LoadLogicalHalfWordP()
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/external/llvm/test/MC/SystemZ/ |
D | insn-good.s | 6531 #CHECK: llhr %r0, %r15 # encoding: [0xb9,0x95,0x00,0x0f] 6532 #CHECK: llhr %r7, %r8 # encoding: [0xb9,0x95,0x00,0x78] 6533 #CHECK: llhr %r15, %r0 # encoding: [0xb9,0x95,0x00,0xf0] 6535 llhr %r0, %r15 6536 llhr %r7, %r8 6537 llhr %r15, %r0
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/external/valgrind/docs/internals/ |
D | s390-opcodes.csv | 657 llhr,"load logical halfword 32",implemented,
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/external/llvm/test/MC/Disassembler/SystemZ/ |
D | insns.txt | 4876 # CHECK: llhr %r0, %r15 4879 # CHECK: llhr %r7, %r8 4882 # CHECK: llhr %r15, %r0
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