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/external/llvm/utils/emacs/
DREADME1 -*- llvm/utils/emacs/README -*-
6 * llvm-mode.el
8 Syntax highlighting mode for LLVM assembly files. To use, add this code to
12 (cons (expand-file-name "path-to-llvm/utils/emacs") load-path))
13 (require 'llvm-mode)
15 * tablegen-mode.el
17 Syntax highlighting mode for TableGen description files. To use, add this code
21 (cons (expand-file-name "path-to-llvm/utils/emacs") load-path))
22 (require 'tablegen-mode)
26 <llvm-bugs [at] lists.llvm.org>; if you wish to provide a patch to improve the
/external/swiftshader/third_party/LLVM/utils/emacs/
DREADME1 -*- llvm/utils/emacs/README -*-
6 * llvm-mode.el
8 Syntax highlighting mode for LLVM assembly files. To use, add this code to
12 (cons (expand-file-name "path-to-llvm/utils/emacs") load-path))
13 (require 'llvm-mode)
15 * tablegen-mode.el
17 Syntax highlighting mode for TableGen description files. To use, add this code
21 (cons (expand-file-name "path-to-llvm/utils/emacs") load-path))
22 (require 'tablegen-mode)
/external/llvm/test/MC/ARM/
Darm-thumb-cpus.s1 @ RUN: not llvm-mc -show-encoding -triple=arm-eabi < %s 2>&1 \
4 @ RUN: llvm-mc -show-encoding -triple=armv4t < %s 2>&1 \
7 @ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-a15 < %s 2>&1 \
10 @ RUN: not llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-m3 < %s 2>&1 \
13 @ RUN: not llvm-mc -show-encoding -triple=armv7m-eabi < %s 2>&1 \
16 @ RUN: not llvm-mc -show-encoding -triple=armv6m-eabi < %s 2>&1 \
19 @ RUN: not llvm-mc -show-encoding -triple=armv6sm-eabi < %s 2>&1 \
30 @ CHECK-ARM-ONLY: target does not support Thumb mode
31 @ CHECK-ARM-ONLY: target does not support Thumb mode
33 @ CHECK-THUMB-ONLY: target does not support ARM mode
[all …]
Dthumb2-dsp-diag.s1 @ RUN: not llvm-mc -triple=thumbv7m 2>&1 < %s | FileCheck --check-prefix=CHECK-ERRORS %s
2 @ RUN: llvm-mc -triple=thumbv7em -show-encoding < %s | FileCheck --check-prefix=CHECK-7EM %s
9 @ CHECK-ERRORS: error: instruction requires: arm-mode
10 @ CHECK-ERRORS: error: instruction requires: arm-mode
11 @ CHECK-ERRORS: error: instruction requires: arm-mode
12 @ CHECK-ERRORS: error: instruction requires: arm-mode
25 @ CHECK-ERRORS: error: instruction requires: arm-mode
26 @ CHECK-ERRORS: error: instruction requires: arm-mode
27 @ CHECK-ERRORS: error: instruction requires: arm-mode
28 @ CHECK-ERRORS: error: instruction requires: arm-mode
Ddirective-arch_extension-idiv.s1 @ RUN: not llvm-mc -triple armv6-eabi -filetype asm -o /dev/null 2>&1 %s \
3 @ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
5 @ RUN: not llvm-mc -triple armv7m-eabi -filetype asm -o /dev/null 2>&1 %s \
7 @ RUN: not llvm-mc -triple thumbv6-eabi -filetype asm -o /dev/null 2>&1 %s \
9 @ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null 2>&1 %s \
11 @ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o /dev/null 2>&1 %s \
28 @ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
31 @ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
45 @ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
50 @ CHECK-THUMBv6: error: instruction requires: divide in ARM arm-mode
Dinvalid-idiv.s1 @ RUN: not llvm-mc -triple=armv7 -mcpu=cortex-a15 -mattr=-hwdiv-arm < %s 2> %t
3 @ RUN: not llvm-mc -triple=thumbv7 -mcpu=cortex-a15 -mattr=-hwdiv < %s 2> %t
5 @ RUN: not llvm-mc -triple=armv7 < %s 2> %t
7 @ RUN: not llvm-mc -triple=thumbv7 < %s 2> %t
16 @ THUMB-A15: error: instruction requires: arm-mode
18 @ THUMB-A15: error: instruction requires: arm-mode
Ddirective-arch-mode-switch.s1 @ RUN: llvm-mc -triple arm-none-eabi -filetype asm %s 2>%t | FileCheck %s
4 @ Start in arm mode
8 @ In ARM mode, switch to an arch which has ARM and Thumb, no warning or .code directive (stay in AR…
15 @ In ARM mode, switch to an arch which has Thumb only, expect warning and .code 16 directive
17 …ERR: [[@LINE-1]]:{{[0-9]+}}: warning: new target does not support arm mode, switching to thumb mode
21 @ In Thumb mode, switch to an arch which has ARM and Thumb, no warning or .code directive (stay in …
28 @ In Thumb mode, switch to a CPU which has ARM and Thumb, no warning or .code directive (stay in Th…
35 @ Switch to ARM mode
39 @ In ARM mode, switch to a CPU which has ARM and Thumb, no warning or .code directive (stay in ARM
46 @ In ARM mode, switch to a CPU which has Thumb only, expect warning and .code 16 directive
[all …]
Dthumb2-bxj.s1 @ RUN: llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s | FileCheck %s
2 @ RUN: llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s | FileCheck %s
3 @ RUN: llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s | FileCheck %s
4 @ RUN: llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s | FileCheck %s
5 @ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-pref…
10 @ UNDEF: error: instruction requires: arm-mode
Dinst-arm-suffixes.s1 @ RUN: not llvm-mc %s -triple armv7-linux-gnueabi -filetype asm -o - 2>&1 \
12 @ CHECK-ERROR: width suffixes are invalid in ARM mode
14 @ CHECK-ERROR: width suffixes are invalid in ARM mode
Dthumb2-diagnostics.s1 @ RUN: not llvm-mc -triple=thumbv7-apple-darwin < %s 2> %t
4 @ RUN: not llvm-mc -triple=thumbv8-apple-darwin < %s 2> %t
96 @ CHECK-ERRORS: error: 'asr #32' shift amount not allowed in Thumb mode
97 @ CHECK-ERRORS: error: 'asr #32' shift amount not allowed in Thumb mode
114 @ CHECK-ERRORS: error: instruction requires: arm-mode
115 @ CHECK-ERRORS: error: instruction requires: arm-mode
116 @ CHECK-ERRORS: error: instruction requires: arm-mode
118 @ CHECK-ERRORS: error: instruction requires: arm-mode
120 @ CHECK-ERRORS: error: instruction requires: arm-mode
Dthumb2-bxj-v8.s1 @ RUN: not llvm-mc -triple=thumbv6t2--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-pre…
2 @ RUN: not llvm-mc -triple=thumbv7a--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-pre…
3 @ RUN: not llvm-mc -triple=thumbv7r--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-pre…
4 @ RUN: not llvm-mc -triple=thumbv7m--none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-pre…
5 @ RUN: llvm-mc -triple=thumbv8a--none-eabi -show-encoding < %s 2>&1 | FileCheck %s
11 @ ARM_MODE: error: instruction requires: arm-mode
Darm-thumb-cpus-default.s1 @ RUN: llvm-mc -show-encoding -triple=arm-eabi < %s \
4 @ RUN: llvm-mc -show-encoding -triple=armv4t-eabi < %s \
7 @ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-a15 < %s \
10 @ RUN: llvm-mc -show-encoding -triple=arm-eabi -mcpu=cortex-m3 < %s \
13 @ RUN: llvm-mc -show-encoding -triple=armv7m-eabi < %s \
16 @ RUN: llvm-mc -show-encoding -triple=armv6m-eabi < %s \
20 @ ARM/Thumb mode.
/external/swiftshader/third_party/LLVM/utils/vim/
DREADME1 -*- llvm/utils/vim/README -*-
5 * llvm.vim
7 Syntax highlighting mode for LLVM assembly files. To use, copy `llvm.vim' to
11 au! BufRead,BufNewFile *.ll set filetype=llvm
16 Syntax highlighting mode for TableGen description files. To use, copy
30 to symlink ~/.vim/syntax itself to llvm/utils/vim .
40 " LLVM Makefile highlighting mode
/external/llvm/test/tools/dsymutil/X86/
Dmultiple-inputs.test9 # Multiple inputs in flat mode
10 RUN: llvm-dsymutil -f -oso-prepend-path=%p/.. %T/multiple-inputs/basic.macho.x86_64 %T/multiple-inp…
11 RUN: llvm-dwarfdump %T/multiple-inputs/basic.macho.x86_64.dwarf \
13 RUN: llvm-dwarfdump %T/multiple-inputs/basic-archive.macho.x86_64.dwarf \
15 RUN: llvm-dwarfdump %T/multiple-inputs/basic-lto.macho.x86_64.dwarf | FileCheck %S/basic-lto-linkin…
16 RUN: llvm-dwarfdump %T/multiple-inputs/basic-lto-dw4.macho.x86_64.dwarf | FileCheck %S/basic-lto-dw…
19 RUN: llvm-dsymutil -oso-prepend-path=%p/.. %T/multiple-inputs/basic.macho.x86_64 %T/multiple-inputs…
20 RUN: llvm-dwarfdump %t.dSYM/Contents/Resources/DWARF/basic.macho.x86_64 \
22 RUN: llvm-dwarfdump %t.dSYM/Contents/Resources/DWARF/basic-archive.macho.x86_64 \
24 RUN: llvm-dwarfdump %t.dSYM/Contents/Resources/DWARF/basic-lto.macho.x86_64 | FileCheck %S/basic-lt…
[all …]
/external/mesa3d/src/gallium/auxiliary/draw/
Ddraw_pt.c98 if (draw->pt.middle.llvm) { in draw_pt_arrays()
99 middle = draw->pt.middle.llvm; in draw_pt_arrays()
182 if (draw->llvm) in draw_pt_init()
183 draw->pt.middle.llvm = draw_pt_fetch_pipeline_or_emit_llvm( draw ); in draw_pt_init()
192 if (draw->pt.middle.llvm) { in draw_pt_destroy()
193 draw->pt.middle.llvm->destroy( draw->pt.middle.llvm ); in draw_pt_destroy()
194 draw->pt.middle.llvm = NULL; in draw_pt_destroy()
357 const unsigned prim = info->mode; in draw_pt_arrays_restart()
421 unsigned mode, in draw_arrays_instanced() argument
431 info.mode = mode; in draw_arrays_instanced()
[all …]
/external/llvm/test/Instrumentation/AddressSanitizer/
Dlifetime-uar-uas.ll1 ; Test handling of llvm.lifetime intrinsics in UAR/UAS modes.
9 declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
10 declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
19 call void @llvm.lifetime.start(i64 1, i8* %c)
20 ; Memory is unpoisoned at llvm.lifetime.start
26 call void @llvm.lifetime.end(i64 1, i8* %c)
27 ; Memory is poisoned at llvm.lifetime.end
30 ; Unpoison memory at function exit in UAS mode.
37 ; No poisoning/poisoning at all in plain mode.
/external/boringssl/src/
DFUZZING.md5 We primarily use Clang's [libFuzzer](http://llvm.org/docs/LibFuzzer.html) for fuzz testing and ther…
13 …only provided and you may need to download the [Clang source code](http://llvm.org/releases/downlo…
16 svn co http://llvm.org/svn/llvm-project/llvm/trunk/lib/Fuzzer
55 ## Fuzzer mode
75 … test suite. The test suite has a `-fuzzer` flag which mirrors the fuzzer mode changes above and a…
77 …with only `BORINGSSL_UNSAFE_DETERMINISTIC_MODE` defined. To build in this mode, pass `-DNO_FUZZER_…
83 ./refresh_fuzzer_corpora.sh /path/to/fuzzer/mode/build /path/to/non/fuzzer/mode/build
/external/llvm/test/tools/gold/X86/
Dthinlto.ll3 ; RUN: llvm-as %s -o %t.o
4 ; RUN: llvm-as %p/Inputs/thinlto.ll -o %t2.o
13 ; RUN: llvm-nm %t4 | FileCheck %s --check-prefix=NM
24 ; RUN: llvm-bcanalyzer -dump %t.o.thinlto.bc | FileCheck %s --check-prefix=BACKEND1
25 ; RUN: llvm-bcanalyzer -dump %t2.o.thinlto.bc | FileCheck %s --check-prefix=BACKEND2
28 ; Ensure gold generates an index as well as a binary by default in ThinLTO mode.
29 ; First force single-threaded mode
34 ; RUN: llvm-bcanalyzer -dump %t4.thinlto.bc | FileCheck %s --check-prefix=COMBINED
35 ; RUN: llvm-nm %t4 | FileCheck %s --check-prefix=NM
37 ; Next force multi-threaded mode
[all …]
/external/llvm/docs/CommandGuide/
Dllvm-config.rst1 llvm-config - Print LLVM compilation options
9 **llvm-config** *option* [*components*...]
16 **llvm-config** makes it easier to build applications that use LLVM. It can
30 g++ `llvm-config --cxxflags` -o HowToUseJIT.o -c HowToUseJIT.cpp
31 g++ `llvm-config --ldflags` -o HowToUseJIT HowToUseJIT.o \
32 `llvm-config --libs engine bcreader scalaropts`
49 Print a summary of **llvm-config** arguments.
136 **--build-mode**
138 Print the build mode used when LLVM was built (e.g. Debug or Release)
147 To print a list of all available components, run **llvm-config
[all …]
/external/swiftshader/third_party/LLVM/docs/CommandGuide/
Dllvm-config.pod5 llvm-config - Print LLVM compilation options
9 B<llvm-config> I<option> [I<components>...]
13 B<llvm-config> makes it easier to build applications that use LLVM. It can
21 g++ `llvm-config --cxxflags` -o HowToUseJIT.o -c HowToUseJIT.cpp
22 g++ `llvm-config --ldflags` -o HowToUseJIT HowToUseJIT.o \
23 `llvm-config --libs engine bcreader scalaropts`
35 Print a summary of B<llvm-config> arguments.
94 =item B<--build-mode>
96 Print the build mode used when LLVM was built (e.g. Debug or Release)
102 To print a list of all available components, run B<llvm-config
[all …]
/external/llvm/test/Transforms/LoopVectorize/
Dfuncall.ll6 ; They might read the rounding mode but we are only vectorizing loops that
8 ; mode, so vectorizing them is safe.
21 %1 = tail call double @llvm.pow.f64(double %0, double %t)
32 declare double @llvm.pow.f64(double, double)
/external/swiftshader/third_party/LLVM/lib/Archive/
DArchiveInternals.h32 namespace llvm {
50 char mode[8]; ///< file mode in ASCII octal variable
63 memset(mode,' ',8); in init()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenSubtargetInfo.inc12 namespace llvm {
46 } // End llvm namespace
52 namespace llvm {
54 llvm::SubtargetFeatureKV X86FeatureKV[] = {
58 { "64bit-mode", "64-bit mode (x86_64)", X86::Mode64Bit, 0ULL },
72 { "nacl-mode", "Native Client mode", X86::ModeNaCl, 0ULL },
87 llvm::SubtargetFeatureKV X86SubTypeKV[] = {
145 } // End llvm namespace
151 #include "llvm/Support/Debug.h"
152 #include "llvm/Support/raw_ostream.h"
[all …]
/external/llvm/utils/jedit/
DREADME1 -*- llvm/utils/jedit/README -*-
7 Syntax highlighting mode for TableGen description files. To use, copy this
13 <llvm-bugs [at] lists.llvm.org>; if you wish to provide a patch to improve the
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dmode-switch.s1 @ Test ARM / Thumb mode switching with .code
2 @ RUN: llvm-mc -triple armv7-unknown-unknown -show-encoding < %s | FileCheck %s
3 @ RUN: llvm-mc -triple thumbv7-unknown-unknown -show-encoding <%s | FileCheck %s

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