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Searched refs:mfspr (Results 1 – 25 of 52) sorted by relevance

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/external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/
Debb.c39 val = mfspr(SPRN_MMCR0); in reset_ebb_with_clear_mask()
61 val = mfspr(SPRN_MMCR0); in ebb_check_mmcr0()
104 val = mfspr(SPRN_BESCR); in standard_ebb_callee()
113 val = mfspr(SPRN_MMCR0); in standard_ebb_callee()
221 mmcr0 = mfspr(SPRN_MMCR0); in dump_ebb_hw_state()
222 bescr = mfspr(SPRN_BESCR); in dump_ebb_hw_state()
236 mmcr0, decode_mmcr0(mmcr0), mfspr(SPRN_MMCR2), in dump_ebb_hw_state()
237 mfspr(SPRN_EBBHR), bescr, decode_bescr(bescr), in dump_ebb_hw_state()
238 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2), mfspr(SPRN_PMC3), in dump_ebb_hw_state()
239 mfspr(SPRN_PMC4), mfspr(SPRN_PMC5), mfspr(SPRN_PMC6), in dump_ebb_hw_state()
[all …]
Debb_lmr.c57 printf("Testing mask 0x%016lx\n", mfspr(SPRN_LMSER)); in ebb_lmr_section_test()
86 FAIL_IF(mfspr(SPRN_LMSER) != 0); in ebb_lmr()
90 FAIL_IF(mfspr(SPRN_LMRR) != ((unsigned long)test_mem | LM_SIZE)); in ebb_lmr()
101 FAIL_IF(mfspr(SPRN_LMSER) != (1UL << 63)); in ebb_lmr()
105 mtspr(SPRN_BESCR, mfspr(SPRN_BESCR) | BESCR_LME); in ebb_lmr()
106 FAIL_IF(!(mfspr(SPRN_BESCR) & BESCR_LME)); in ebb_lmr()
111 FAIL_IF(mfspr(SPRN_BESCR) & BESCR_LME); // LM now disabled in ebb_lmr()
112 FAIL_IF(!(mfspr(SPRN_BESCR) & BESCR_LMEO)); // occurred bit set in ebb_lmr()
Dcycles_with_freeze_test.c30 val = mfspr(SPRN_BESCR); in ebb_callee()
39 val = mfspr(SPRN_MMCR0); in ebb_callee()
84 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in cycles_with_freeze()
90 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in cycles_with_freeze()
92 val = mfspr(SPRN_MMCR0); in cycles_with_freeze()
Dback_to_back_ebbs_test.c31 val = mfspr(SPRN_BESCR); in ebb_callee()
52 siar = mfspr(SPRN_SIAR); in ebb_callee()
55 val = mfspr(SPRN_PMC1); in ebb_callee()
58 val = mfspr(SPRN_MMCR0); in ebb_callee()
Dclose_clears_pmcc_test.c51 mfspr(SPRN_EBBHR); in close_clears_pmcc()
52 mfspr(SPRN_EBBRR); in close_clears_pmcc()
53 mfspr(SPRN_BESCR); in close_clears_pmcc()
Dfork_cleanup_test.c30 FAIL_IF(mfspr(SPRN_BESCR) != 0); in child()
31 FAIL_IF(mfspr(SPRN_EBBHR) != 0); in child()
32 FAIL_IF(mfspr(SPRN_EBBRR) != 0); in child()
Dinstruction_count_test.c35 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in do_count_loop()
41 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) | MMCR0_FC); in do_count_loop()
94 val = mfspr(SPRN_BESCR); in pmc4_ebb_callee()
128 mtspr(SPRN_MMCR0, mfspr(SPRN_MMCR0) & ~MMCR0_FC); in instruction_count()
Dpmc56_overflow_test.c23 val = mfspr(SPRN_BESCR); in ebb_callee()
32 val = mfspr(SPRN_PMC5); in ebb_callee()
38 val = mfspr(SPRN_PMC6); in ebb_callee()
Dpmae_handling_test.c35 val = mfspr(SPRN_BESCR); in syscall_ebb_callee()
44 before = mfspr(SPRN_MMCR0); in syscall_ebb_callee()
49 after = mfspr(SPRN_MMCR0); in syscall_ebb_callee()
Debb_lmr_regs.c27 FAIL_IF(mfspr(SPRN_LMRR) != (i << 25)); in ebb_lmr_regs()
28 FAIL_IF(mfspr(SPRN_LMSER) != i); in ebb_lmr_regs()
Dreg_access_test.c24 val = mfspr(SPRN_BESCR); in reg_access()
30 val = mfspr(SPRN_EBBHR); in reg_access()
Dno_handler_test.c34 val = mfspr(SPRN_EBBHR); in no_handler_test()
48 val = mfspr(SPRN_MMCR0); in no_handler_test()
Debb_lmr.h14 unsigned long bescr = mfspr(SPRN_BESCR); in ebb_lmr_reset()
/external/llvm/test/MC/PowerPC/
Dppc64-encoding-bookIII.s24 # CHECK-BE: mfspr 4, 260 # encoding: [0x7c,0x84,0x42,0xa6]
25 # CHECK-LE: mfspr 4, 260 # encoding: [0xa6,0x42,0x84,0x7c]
28 # CHECK-BE: mfspr 4, 261 # encoding: [0x7c,0x85,0x42,0xa6]
29 # CHECK-LE: mfspr 4, 261 # encoding: [0xa6,0x42,0x85,0x7c]
32 # CHECK-BE: mfspr 4, 262 # encoding: [0x7c,0x86,0x42,0xa6]
33 # CHECK-LE: mfspr 4, 262 # encoding: [0xa6,0x42,0x86,0x7c]
36 # CHECK-BE: mfspr 4, 263 # encoding: [0x7c,0x87,0x42,0xa6]
37 # CHECK-LE: mfspr 4, 263 # encoding: [0xa6,0x42,0x87,0x7c]
40 # CHECK-BE: mfspr 2, 260 # encoding: [0x7c,0x44,0x42,0xa6]
41 # CHECK-LE: mfspr 2, 260 # encoding: [0xa6,0x42,0x44,0x7c]
[all …]
Ddeprecated-p7.s7 # CHECK: mfspr 3, 268
/external/fio/arch/
Darch-ppc.h51 static inline unsigned int mfspr(unsigned int reg) in mfspr() function
71 tbu0 = mfspr(SPRN_ATBU); in get_cpu_clock()
72 tbl = mfspr(SPRN_ATBL); in get_cpu_clock()
73 tbu1 = mfspr(SPRN_ATBU); in get_cpu_clock()
75 tbu0 = mfspr(SPRN_TBRU); in get_cpu_clock()
76 tbl = mfspr(SPRN_TBRL); in get_cpu_clock()
77 tbu1 = mfspr(SPRN_TBRU); in get_cpu_clock()
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding-bookIII.txt18 # CHECK: mfspr 4, 272
21 # CHECK: mfspr 4, 273
24 # CHECK: mfspr 4, 274
27 # CHECK: mfspr 4, 275
57 # CHECK: mfspr 4, 22
66 # CHECK: mfspr 4, 25
72 # CHECK: mfspr 4, 26
78 # CHECK: mfspr 4, 27
/external/llvm/test/CodeGen/PowerPC/
Dppc32-cyclecounter.ll13 ; CHECK: mfspr 3, 269
14 ; CHECK: mfspr 4, 268
15 ; CHECK: mfspr [[REG:[0-9]+]], 269
Dmftb.ll3 ; On all other CPUs (including generic, ppc, ppc64), the mfspr instruction
29 ; CHECK-MFSPR: mfspr 3, 268
41 ; CHECK-MFSPR: mfspr 3, 269
53 ; CHECK-MFSPR: mfspr 3, 268
65 ; CHECK-MFSPR: mfspr 3, 269
Dhtm.ll91 ; CHECK: mfspr [[REG1:[0-9]+]], 130
99 ; CHECK: mfspr [[REG1:[0-9]+]], 131
107 ; CHECK: mfspr [[REG1:[0-9]+]], 128
115 ; CHECK: mfspr [[REG1:[0-9]+]], 129
Dppc64-cyclecounter.ll12 ; CHECK: mfspr 3, 268
/external/linux-kselftest/tools/testing/selftests/powerpc/tm/
Dtm-tmspr.c63 tfhar_rd = mfspr(SPRN_TFHAR); in tfiar_tfhar()
64 tfiar_rd = mfspr(SPRN_TFIAR); in tfiar_tfhar()
90 result = mfspr(SPRN_TEXASR); in texasr()
/external/boringssl/linux-ppc64le/crypto/modes/
Dghashp8-ppc.S10 mfspr 12,256
135 mfspr 12,256
185 mfspr 12,256
/external/valgrind/coregrind/m_dispatch/
Ddispatch-ppc32-linux.S140 mfspr 6,256 /* vrsave reg is spr number 256 */
337 mfspr 4,256 /* VRSAVE reg is spr number 256 */
/external/linux-kselftest/tools/testing/selftests/powerpc/
Dreg.h12 #define mfspr(rn) ({unsigned long rval; \ macro

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