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/external/llvm/test/MC/ARM/
Dcoff-relocations.s57 @ CHECK-ENCODING-NEXT: movs r0, r0
58 @ CHECK-ENCODING-NEXT: movs r0, r0
72 @ CHECK-ENCODING-NEXT: movs r0, r0
73 @ CHECK-ENCODING-NEXT: movs r0, r0
87 @ CHECK-ENCODING-NEXT: movs r0, r0
88 @ CHECK-ENCODING-NEXT: movs r0, r0
Darm-thumb-cpus-default.s21 movs r0, r0
22 @ CHECK-ARM-THUMB: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
23 @ CHECK-ARM-ONLY: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
24 @ CHECK-THUMB-ONLY: movs r0, r0 @ encoding: [0x00,0x00]
Dmisaligned-blx.s30 movs r0, r0
32 movs r0, r0
34 movs r0, r0
/external/llvm/lib/Target/X86/
DX86InstrExtension.td44 "movs{bw|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVSX_R16_R8>,
48 "movs{bw|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVSX_R16_M8>,
52 "movs{bl|x}\t{$src, $dst|$dst, $src}",
56 "movs{bl|x}\t{$src, $dst|$dst, $src}",
60 "movs{wl|x}\t{$src, $dst|$dst, $src}",
64 "movs{wl|x}\t{$src, $dst|$dst, $src}",
110 "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
115 "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
124 "movs{bq|x}\t{$src, $dst|$dst, $src}",
128 "movs{bq|x}\t{$src, $dst|$dst, $src}",
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrExtension.td42 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
44 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
46 "movs{bl|x}\t{$src, $dst|$dst, $src}",
49 "movs{bl|x}\t{$src, $dst|$dst, $src}",
52 "movs{wl|x}\t{$src, $dst|$dst, $src}",
55 "movs{wl|x}\t{$src, $dst|$dst, $src}",
93 "movs{bq|x}\t{$src, $dst|$dst, $src}",
96 "movs{bq|x}\t{$src, $dst|$dst, $src}",
99 "movs{wq|x}\t{$src, $dst|$dst, $src}",
102 "movs{wq|x}\t{$src, $dst|$dst, $src}",
[all …]
/external/llvm/test/CodeGen/Thumb/
Dthumb-shrink-wrapping.ll40 ; CHECK: movs r0, #0
88 ; CHECK: movs r0, #42
134 ; CHECK: movs [[SUM:r0]], #0
135 ; CHECK-NEXT: movs [[IV:r[0-9]+]], #10
139 ; CHECK: movs [[TMP:r[0-9]+]], #1
176 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()
205 ; CHECK: movs [[SUM:r0]], #0
206 ; CHECK-NEXT: movs [[IV:r[0-9]+]], #10
209 ; CHECK: movs [[TMP:r[0-9]+]], #1
230 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()
[all …]
Dbic_imm.ll6 ; CHECK-T1: movs r1, #255
19 ; CHECK-T1: movs r1, #128
/external/llvm/test/CodeGen/ARM/
Dload.ll176 ; CHECK-T1: movs r1, #31
188 ; CHECK-T1: movs r1, #62
261 ; CHECK-T1: movs r1, #32
273 ; CHECK-T1: movs r1, #64
285 ; CHECK-T1: movs r1, #32
297 ; CHECK-T1: movs r1, #64
309 ; CHECK-T1: movs r1, #128
320 ; CHECK-T1: movs r2, #32
332 ; CHECK-T1: movs r2, #64
344 ; CHECK-T1: movs r2, #128
[all …]
Dreadcyclecounter.ll20 ; CHECK: {{movs?}} r1, #0
22 ; CHECK-NO-PERFMON: {{movs?}} r0, #0
23 ; CHECK-NO-PERFMON: {{movs?}} r1, #0
Dcmpxchg-idioms.ll24 ; CHECK: movs r0, #0
30 ; CHECK: movs r0, #1
62 ; CHECK: movs [[TMP:r[0-9]+]], #0
68 ; CHECK: movs [[TMP:r[0-9]+]], #1
Datomic-cmpxchg.ll29 ; CHECK-THUMB: movs r0, #1
30 ; CHECK-THUMB: movs [[R2:r[0-9]+]], #0
56 ; CHECK-THUMBV6-NEXT: movs r0, #1
57 ; CHECK-THUMBV6-NEXT: movs [[ZERO:r[0-9]+]], #0
98 ; CHECK-THUMBV7-NEXT: movs r0, #0
Dminsize-imms.ll6 ; CHECK: movs r0, #255 @ encoding: [0xff,0x20]
16 ; CHECK-V6M: movs [[TMP:r[0-7]]], #203 @ encoding: [0xcb,0x20]
29 ; CHECK-V6M: movs [[TMP:r[0-7]]], #9 @ encoding: [0x09,0x20]
Daapcs-hfa-code.ll78 ; CHECK-M4F: movs [[ONEHI:r[0-9]+]], #0
79 ; CHECK-M4F: movs [[ONELO:r[0-9]+]], #0
99 ; CHECK-M4F: movs [[ONEHI:r[0-9]+]], #0
100 ; CHECK-M4F: movs [[ONELO:r[0-9]+]], #0
Dindirectbr-3.ll12 ; CHECK: movs r0, #2
13 ; CHECK: movs r0, #1
D2010-05-18-PostIndexBug.ll15 ; THUMB-DAG: movs r[[ADDR:[0-9]+]], #8
16 ; THUMB-DAG: movs [[VAL:r[0-9]+]], #0
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dthumb-printf.txt35 # CHECK-NEXT: movs r3, #142
36 # CHECK-NEXT: movs r5, r0
38 # CHECK-NEXT: movs r5, r0
40 # CHECK-NEXT: movs r5, r0
/external/llvm/test/MC/Disassembler/ARM/
Dthumb-printf.txt35 # CHECK-NEXT: movs r3, #142
36 # CHECK-NEXT: movs r5, r0
38 # CHECK-NEXT: movs r5, r0
40 # CHECK-NEXT: movs r5, r0
/external/llvm/test/CodeGen/Thumb2/
Dsetjmp_longjmp.ll16 ; CHECK-NEXT: movs r0, #0
18 ; CHECK-NEXT: movs r0, #1
25 ; CHECK-NEXT: movs r0, #0
27 ; CHECK-NEXT: movs r0, #1
Dfloat-cmp.ll10 ; NONE: movs r0, #0
11 ; HARD: movs r0, #0
140 ; NONE: movs r0, #1
141 ; HARD: movs r0, #1
148 ; NONE: movs r0, #0
149 ; HARD: movs r0, #0
251 ; NONE: movs r0, #1
252 ; HARD: movs r0, #1
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Diabs.ll4 ;; movs r0, r0
13 ; CHECK: movs r0, r0
Dthumb2-it-block.ll6 ; CHECK: movs.w
9 ; CHECK-NEXT: movs.w
D2011-04-11-MachineLICMBug.ll18 ; CHECK: movs r{{[0-9]+}}, #{{[01]}}
25 ; CHECK: movs r{{[0-9]+}}, #{{[01]}}
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/
Diabs.ll6 ;; movs r0, r0
16 ; CHECK: movs r0, r0
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-thumb-instructions.s352 movs r2, #0
353 movs r2, #255
354 movs r2, #23
356 @ CHECK: movs r2, #0 @ encoding: [0x00,0x22]
357 @ CHECK: movs r2, #255 @ encoding: [0xff,0x22]
358 @ CHECK: movs r2, #23 @ encoding: [0x17,0x22]
365 movs r1, r3
368 @ CHECK: movs r1, r3 @ encoding: [0x19,0x00]
/external/llvm/test/MC/ARM/Windows/
Dmultiple-text-sections.s15 movs r0, #65
26 movs r0, #66

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