| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 1279 orns r4, r5, r6
1281 orns r4, r5, r6, lsr #5
1283 orns r4, r5, r6, asr #5
1288 @ CHECK: orns r4, r5, r6 @ encoding: [0x75,0xea,0x06,0x04]
1290 @ CHECK: orns r4, r5, r6, lsr #5 @ encoding: [0x75,0xea,0x56,0x14]
1292 @ CHECK: orns r4, r5, r6, asr #5 @ encoding: [0x75,0xea,0x66,0x14]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 1680 orns r4, r5, r6
1682 orns r4, r5, r6, lsr #5
1684 orns r4, r5, r6, asr #5
1689 @ CHECK: orns r4, r5, r6 @ encoding: [0x75,0xea,0x06,0x04]
1691 @ CHECK: orns r4, r5, r6, lsr #5 @ encoding: [0x75,0xea,0x56,0x14]
1693 @ CHECK: orns r4, r5, r6, asr #5 @ encoding: [0x75,0xea,0x66,0x14]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-operand-const-t32.cc | 63 M(orns) \
|
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 63 M(orns) \
|
| D | test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 63 M(orns) \
|
| D | test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 63 M(orns) \
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1104 # CHECK: orns r4, r5, r6
1106 # CHECK: orns r4, r5, r6, lsr #5
1108 # CHECK: orns r4, r5, r6, asr #5
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1221 # CHECK: orns r4, r5, r6
1223 # CHECK: orns r4, r5, r6, lsr #5
1225 # CHECK: orns r4, r5, r6, asr #5
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.cc | 1356 orns(cond, rd, rn, ~imm); in Delegate()
|
| D | assembler-aarch32.h | 2648 void orns(Condition cond, Register rd, Register rn, const Operand& operand);
2649 void orns(Register rd, Register rn, const Operand& operand) { in orns() function
2650 orns(al, rd, rn, operand); in orns()
|
| D | disasm-aarch32.h | 823 void orns(Condition cond, Register rd, Register rn, const Operand& operand);
|
| D | disasm-aarch32.cc | 1999 void Disassembler::orns(Condition cond, in orns() function in vixl::aarch32::Disassembler
8666 orns(CurrentCond(), Register(rd), Register(rn), imm); in DecodeT32()
19106 orns(CurrentCond(), in DecodeT32()
19129 orns(CurrentCond(), in DecodeT32()
|
| D | assembler-aarch32.cc | 7085 void Assembler::orns(Condition cond, in orns() function in vixl::aarch32::Assembler
7122 Delegate(kOrns, &Assembler::orns, cond, rd, rn, operand); in orns()
|
| D | macro-assembler-aarch32.h | 2799 orns(cond, rd, rn, operand); in Orns()
|