| /external/valgrind/none/tests/arm/ |
| D | v6media.stdout.exp | 2371 qsub8 r0, r1, r2 :: rd 0x00f1fffc rm 0x0009ffff, rn 0x00180003, carryin 0, cpsr 0x00000000 ge…
2372 qsub8 r0, r1, r2 :: rd 0x000f0104 rm 0x00180003, rn 0x0009ffff, carryin 0, cpsr 0x00000000 ge…
2373 qsub8 r0, r1, r2 :: rd 0x0104000f rm 0x00030018, rn 0xffff0009, carryin 0, cpsr 0x00000000 ge…
2374 qsub8 r0, r1, r2 :: rd 0xfffc00f1 rm 0xffff0009, rn 0x00030018, carryin 0, cpsr 0x00000000 ge…
2375 qsub8 r0, r1, r2 :: rd 0x7fff7fff rm 0x7fff7fff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge…
2376 qsub8 r0, r1, r2 :: rd 0x7ffe81fe rm 0x7fff00ff, rn 0x80017f01, carryin 0, cpsr 0x00000000 ge…
2377 qsub8 r0, r1, r2 :: rd 0x80008000 rm 0x80008000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge…
2378 qsub8 r0, r1, r2 :: rd 0x81018101 rm 0x80008000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge…
2379 qsub8 r0, r1, r2 :: rd 0xeaf77a6e rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00000000 ge…
2380 qsub8 r0, r1, r2 :: rd 0x6a7f3299 rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x00000000 ge…
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-a32.cc | 59 M(qsub8) \
|
| D | test-assembler-cond-rd-rn-rm-t32.cc | 58 M(qsub8) \
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1226 qsub8 r1, r2, r3
1233 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xe6]
|
| D | basic-thumb2-instructions.s | 1477 qsub8 r1, r2, r3
1485 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xc2,0xfa,0x13,0xf1]
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2769 void qsub8(Condition cond, Register rd, Register rn, Register rm);
2770 void qsub8(Register rd, Register rn, Register rm) { qsub8(al, rd, rn, rm); } in qsub8() function
|
| D | disasm-aarch32.h | 877 void qsub8(Condition cond, Register rd, Register rn, Register rm);
|
| D | assembler-aarch32.cc | 8027 void Assembler::qsub8(Condition cond, Register rd, Register rn, Register rm) { in qsub8() function in vixl::aarch32::Assembler
8044 Delegate(kQsub8, &Assembler::qsub8, cond, rd, rn, rm); in qsub8()
|
| D | disasm-aarch32.cc | 2229 void Disassembler::qsub8(Condition cond, in qsub8() function in vixl::aarch32::Disassembler
21259 qsub8(CurrentCond(), in DecodeT32()
63145 qsub8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
|
| D | macro-assembler-aarch32.h | 3117 qsub8(cond, rd, rn, rm); in Qsub8()
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1833 qsub8 r1, r2, r3
1840 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xf3,0x1f,0x22,0xe6]
|
| D | basic-thumb2-instructions.s | 1904 qsub8 r1, r2, r3
1912 @ CHECK: qsub8 r1, r2, r3 @ encoding: [0xc2,0xfa,0x13,0xf1]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1277 # CHECK: qsub8 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1062 # CHECK: qsub8 r1, r2, r3
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1416 # CHECK: qsub8 r1, r2, r3
|
| D | basic-arm-instructions.txt | 1179 # CHECK: qsub8 r1, r2, r3
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1945 def t2QSUB8 : T2I_pam<0b100, 0b0001, "qsub8">;
|
| D | ARMInstrInfo.td | 3178 def QSUB8 : AAI<0b01100010, 0b11111111, "qsub8">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2150 def t2QSUB8 : T2I_pam<0b100, 0b0001, "qsub8">;
|
| D | ARMInstrInfo.td | 3579 def QSUB8 : AAI<0b01100010, 0b11111111, "qsub8">;
|