| /external/boringssl/mac-x86_64/crypto/sha/ |
| D | sha512-x86_64.S | 26 pushq %r14
55 movq %rax,%r14
61 rorq $5,%r14
65 xorq %rax,%r14
72 rorq $6,%r14
78 xorq %rax,%r14
85 rorq $28,%r14
93 addq %r14,%r11
96 movq %r11,%r14
102 rorq $5,%r14
[all …]
|
| /external/boringssl/linux-x86_64/crypto/sha/ |
| D | sha512-x86_64.S | 27 pushq %r14
56 movq %rax,%r14
62 rorq $5,%r14
66 xorq %rax,%r14
73 rorq $6,%r14
79 xorq %rax,%r14
86 rorq $28,%r14
94 addq %r14,%r11
97 movq %r11,%r14
103 rorq $5,%r14
[all …]
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding-spe.s | 8 evlddx %r14, %r21, %r28
11 evldwx %r14, %r21, %r28
14 evldhx %r14, %r21, %r28
17 evlhhesplatx %r14, %r21, %r28
20 evlhhousplatx %r14, %r21, %r28
23 evlhhossplatx %r14, %r21, %r28
26 evlwhex %r14, %r21, %r28
29 evlwhoux %r14, %r21, %r28
32 evlwhosx %r14, %r21, %r28
35 evlwwsplatx %r14, %r21, %r28
[all …]
|
| /external/boringssl/win-x86_64/crypto/sha/ |
| D | sha512-x86_64.asm | 38 push r14
67 mov r14,rax
73 ror r14,5
77 xor r14,rax
84 ror r14,6
90 xor r14,rax
97 ror r14,28
105 add r11,r14
108 mov r14,r11
114 ror r14,5
[all …]
|
| /external/tremolo/Tremolo/ |
| D | mdctARM.s | 56 STMFD r13!,{r4-r7,r14}
70 MOV r14,r12,ASR #15
71 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
72 EORNE r12,r4, r14,ASR #31
75 MOV r14,r7, ASR #15
76 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
77 EORNE r7, r4, r14,ASR #31
80 MOV r14,r6, ASR #15
81 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
82 EORNE r6, r4, r14,ASR #31
[all …]
|
| D | bitwiseARM.s | 45 STMFD r13!,{r10,r11,r14}
54 RSB r14,r12,#32 @ r14= 32-bitsLeftInWord
57 MOV r10,r10,LSR r14 @ r10= ptr[0]>>(32-bitsLeftInWord)
59 RSB r14,r14,#32 @ r14= 32-bitsLeftInWord
60 ORRLT r10,r10,r11,LSL r14 @ r10= Next 32 bits.
61 MOV r14,#1
62 RSB r14,r14,r14,LSL r1
63 AND r0,r10,r14
72 RSB r14,r12,#32 @ r14= 32-bitsLeftInWord
81 MOV r10,r10,LSR r14 @ r10= first bitsLeftInWord bits
[all …]
|
| D | mdctLARM.s | 54 STMFD r13!,{r4-r7,r14}
68 MOV r14,r12,ASR #15
69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
70 EORNE r12,r4, r14,ASR #31
73 MOV r14,r7, ASR #15
74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
75 EORNE r7, r4, r14,ASR #31
78 MOV r14,r6, ASR #15
79 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range
80 EORNE r6, r4, r14,ASR #31
[all …]
|
| /external/llvm/test/MC/X86/ |
| D | intel-syntax-x86-64-avx512f_vl.s | 21 vcmppd k3,xmm27,XMMWORD PTR [rax+r14*8+0x123],0x7b
77 vcmppd k4,ymm17,YMMWORD PTR [rax+r14*8+0x123],0x7b
133 vcmpps k4,xmm29,XMMWORD PTR [rax+r14*8+0x123],0x7b
189 vcmpps k4,ymm19,YMMWORD PTR [rax+r14*8+0x123],0x7b
229 vgatherdpd xmm17 {k1}, xmmword ptr [r14 + 8*xmm31 + 123]
241 vgatherdpd ymm23 {k1}, ymmword ptr [r14 + 8*xmm31 + 123]
253 vgatherdpd xmm23 {k1}, xmmword ptr [r14 + 8*xmm31 - 123]
265 vgatherdpd ymm18 {k1}, ymmword ptr [r14 + 8*xmm31 - 123]
277 vgatherdps xmm18 {k1}, xmmword ptr [r14 + 8*xmm31 + 123]
289 vgatherdps ymm27 {k1}, ymmword ptr [r14 + 8*ymm31 + 123]
[all …]
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-rd-rn-rm-t32.cc | 104 {{r3, r14, r11}, false, al, "r3 r14 r11", "r3_r14_r11"},
112 {{r13, r14, r13}, false, al, "r13 r14 r13", "r13_r14_r13"},
114 {{r10, r14, r3}, false, al, "r10 r14 r3", "r10_r14_r3"},
118 {{r14, r14, r13}, false, al, "r14 r14 r13", "r14_r14_r13"},
120 {{r0, r14, r1}, false, al, "r0 r14 r1", "r0_r14_r1"},
125 {{r14, r10, r13}, false, al, "r14 r10 r13", "r14_r10_r13"},
131 {{r14, r5, r3}, false, al, "r14 r5 r3", "r14_r5_r3"},
133 {{r14, r9, r9}, false, al, "r14 r9 r9", "r14_r9_r9"},
136 {{r13, r14, r14}, false, al, "r13 r14 r14", "r13_r14_r14"},
138 {{r8, r14, r5}, false, al, "r8 r14 r5", "r8_r14_r5"},
[all …]
|
| D | test-assembler-rd-rn-rm-a32.cc | 104 {{r3, r14, r11}, false, al, "r3 r14 r11", "r3_r14_r11"},
112 {{r13, r14, r13}, false, al, "r13 r14 r13", "r13_r14_r13"},
114 {{r10, r14, r3}, false, al, "r10 r14 r3", "r10_r14_r3"},
118 {{r14, r14, r13}, false, al, "r14 r14 r13", "r14_r14_r13"},
120 {{r0, r14, r1}, false, al, "r0 r14 r1", "r0_r14_r1"},
125 {{r14, r10, r13}, false, al, "r14 r10 r13", "r14_r10_r13"},
131 {{r14, r5, r3}, false, al, "r14 r5 r3", "r14_r5_r3"},
133 {{r14, r9, r9}, false, al, "r14 r9 r9", "r14_r9_r9"},
136 {{r13, r14, r14}, false, al, "r13 r14 r14", "r13_r14_r14"},
138 {{r8, r14, r5}, false, al, "r8 r14 r5", "r8_r14_r5"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-t32-rd-is-rn-in-it-block.cc | 108 {{gt, r14, r14, r11}, true, gt, "gt r14 r14 r11", "gt_r14_r14_r11"},
114 {{ls, r14, r14, r11}, true, ls, "ls r14 r14 r11", "ls_r14_r14_r11"},
120 {{ge, r14, r14, r4}, true, ge, "ge r14 r14 r4", "ge_r14_r14_r4"},
123 {{lt, r13, r13, r14}, true, lt, "lt r13 r13 r14", "lt_r13_r13_r14"},
137 {{ls, r10, r10, r14}, true, ls, "ls r10 r10 r14", "ls_r10_r10_r14"},
140 {{eq, r4, r4, r14}, true, eq, "eq r4 r4 r14", "eq_r4_r4_r14"},
143 {{vc, r6, r6, r14}, true, vc, "vc r6 r6 r14", "vc_r6_r6_r14"},
146 {{cs, r8, r8, r14}, true, cs, "cs r8 r8 r14", "cs_r8_r8_r14"},
154 {{gt, r14, r14, r9}, true, gt, "gt r14 r14 r9", "gt_r14_r14_r9"},
157 {{pl, r14, r14, r10}, true, pl, "pl r14 r14 r10", "pl_r14_r14_r10"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 137 {{al, r14, r12, r14}, false, al, "al r14 r12 r14", "al_r14_r12_r14"},
144 {{al, r14, r7, r11}, false, al, "al r14 r7 r11", "al_r14_r7_r11"},
145 {{al, r11, r4, r14}, false, al, "al r11 r4 r14", "al_r11_r4_r14"},
150 {{al, r0, r11, r14}, false, al, "al r0 r11 r14", "al_r0_r11_r14"},
154 {{al, r7, r14, r7}, false, al, "al r7 r14 r7", "al_r7_r14_r7"},
157 {{al, r8, r14, r11}, false, al, "al r8 r14 r11", "al_r8_r14_r11"},
158 {{al, r10, r14, r2}, false, al, "al r10 r14 r2", "al_r10_r14_r2"},
159 {{al, r14, r11, r6}, false, al, "al r14 r11 r6", "al_r14_r11_r6"},
163 {{al, r14, r12, r7}, false, al, "al r14 r12 r7", "al_r14_r12_r7"},
176 {{al, r14, r3, r4}, false, al, "al r14 r3 r4", "al_r14_r3_r4"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-a32.cc | 129 {{{le, r4, r5, r14}, false, al, "le r4 r5 r14", "le_r4_r5_r14"},
143 {{eq, r9, r14, r10}, false, al, "eq r9 r14 r10", "eq_r9_r14_r10"},
148 {{ne, r14, r2, r13}, false, al, "ne r14 r2 r13", "ne_r14_r2_r13"},
150 {{vc, r10, r8, r14}, false, al, "vc r10 r8 r14", "vc_r10_r8_r14"},
159 {{mi, r6, r14, r0}, false, al, "mi r6 r14 r0", "mi_r6_r14_r0"},
167 {{pl, r11, r14, r5}, false, al, "pl r11 r14 r5", "pl_r11_r14_r5"},
176 {{hi, r8, r9, r14}, false, al, "hi r8 r9 r14", "hi_r8_r9_r14"},
182 {{vc, r7, r13, r14}, false, al, "vc r7 r13 r14", "vc_r7_r13_r14"},
183 {{pl, r11, r14, r4}, false, al, "pl r11 r14 r4", "pl_r11_r14_r4"},
184 {{lt, r12, r14, r8}, false, al, "lt r12 r14 r8", "lt_r12_r14_r8"},
[all …]
|
| D | test-macro-assembler-cond-rd-rn-a32.cc | 99 {{ls, r14, r14}, "ls, r14, r14", "ls_r14_r14"},
107 {{gt, r14, r0}, "gt, r14, r0", "gt_r14_r0"},
128 {{al, r14, r11}, "al, r14, r11", "al_r14_r11"},
136 {{lt, r14, r3}, "lt, r14, r3", "lt_r14_r3"},
137 {{mi, r12, r14}, "mi, r12, r14", "mi_r12_r14"},
142 {{ge, r0, r14}, "ge, r0, r14", "ge_r0_r14"},
151 {{vs, r4, r14}, "vs, r4, r14", "vs_r4_r14"},
155 {{gt, r11, r14}, "gt, r11, r14", "gt_r11_r14"},
156 {{vc, r14, r4}, "vc, r14, r4", "vc_r14_r4"},
160 {{vc, r14, r5}, "vc, r14, r5", "vc_r14_r5"},
[all …]
|
| D | test-macro-assembler-cond-rd-rn-t32.cc | 99 {{ls, r14, r14}, "ls, r14, r14", "ls_r14_r14"},
107 {{gt, r14, r0}, "gt, r14, r0", "gt_r14_r0"},
128 {{al, r14, r11}, "al, r14, r11", "al_r14_r11"},
136 {{lt, r14, r3}, "lt, r14, r3", "lt_r14_r3"},
137 {{mi, r12, r14}, "mi, r12, r14", "mi_r12_r14"},
142 {{ge, r0, r14}, "ge, r0, r14", "ge_r0_r14"},
151 {{vs, r4, r14}, "vs, r4, r14", "vs_r4_r14"},
155 {{gt, r11, r14}, "gt, r11, r14", "gt_r11_r14"},
156 {{vc, r14, r4}, "vc, r14, r4", "vc_r14_r4"},
160 {{vc, r14, r5}, "vc, r14, r5", "vc_r14_r5"},
[all …]
|
| D | test-assembler-cond-rd-operand-rn-shift-rs-a32.cc | 119 {{mi, r9, r14, LSR, r9}, false, al, "mi r9 r14 LSR r9", "mi_r9_r14_LSR_r9"},
127 {{ge, r14, r6, ROR, r13},
132 {{vc, r14, r14, LSR, r11},
151 {{cc, r14, r1, LSR, r14},
172 {{vc, r14, r1, ASR, r9}, false, al, "vc r14 r1 ASR r9", "vc_r14_r1_ASR_r9"},
190 {{cc, r14, r14, ROR, r0},
195 {{ge, r2, r14, ROR, r9}, false, al, "ge r2 r14 ROR r9", "ge_r2_r14_ROR_r9"},
206 {{cs, r7, r14, ASR, r9}, false, al, "cs r7 r14 ASR r9", "cs_r7_r14_ASR_r9"},
214 {{lt, r14, r0, LSL, r10},
219 {{ls, r8, r12, ROR, r14},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 131 {{al, r14, r6, r10, LSR, 32},
141 {{al, r14, r4, r6, LSR, 31},
186 {{al, r11, r6, r14, ASR, 31},
191 {{al, r2, r14, r14, ASR, 18},
201 {{al, r1, r14, r7, LSR, 18},
211 {{al, r14, r5, r12, LSR, 1},
236 {{al, r9, r3, r14, LSR, 30},
241 {{al, r11, r14, r11, LSR, 24},
251 {{al, r14, r13, r10, ASR, 1},
266 {{al, r8, r14, r5, LSR, 27},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc | 126 {{vs, r11, r0, r14, ROR, r1},
166 {{vc, r0, r5, r14, ASR, r12},
176 {{le, r14, r6, r7, ASR, r1},
201 {{mi, r11, r14, r7, LSR, r5},
231 {{vs, r14, r14, r11, LSR, r6},
276 {{hi, r4, r2, r14, LSR, r9},
291 {{hi, r13, r14, r5, LSR, r10},
311 {{ls, r3, r14, r1, LSL, r14},
336 {{vc, r11, r9, r14, LSR, r12},
401 {{cs, r2, r10, r14, ROR, r13},
[all …]
|
| D | test-assembler-cond-rd-operand-rn-t32-in-it-block.cc | 110 {{eq, r0, r14}, true, eq, "eq r0 r14", "eq_r0_r14"},
125 {{eq, r1, r14}, true, eq, "eq r1 r14", "eq_r1_r14"},
140 {{eq, r2, r14}, true, eq, "eq r2 r14", "eq_r2_r14"},
155 {{eq, r3, r14}, true, eq, "eq r3 r14", "eq_r3_r14"},
170 {{eq, r4, r14}, true, eq, "eq r4 r14", "eq_r4_r14"},
185 {{eq, r5, r14}, true, eq, "eq r5 r14", "eq_r5_r14"},
200 {{eq, r6, r14}, true, eq, "eq r6 r14", "eq_r6_r14"},
215 {{eq, r7, r14}, true, eq, "eq r7 r14", "eq_r7_r14"},
230 {{eq, r8, r14}, true, eq, "eq r8 r14", "eq_r8_r14"},
245 {{eq, r9, r14}, true, eq, "eq r9 r14", "eq_r9_r14"},
[all …]
|
| D | test-assembler-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 121 {{mi, r10, r14, r13, LSL, 10},
141 {{ge, r3, r14, r7, ROR, 7},
161 {{ge, r14, r14, r8, LSL, 4},
166 {{vs, r1, r5, r14, LSL, 15},
186 {{vc, r14, r13, r10, ROR, 7},
206 {{ne, r8, r11, r14, ROR, 19},
231 {{eq, r8, r14, r0, LSL, 26},
236 {{cs, r11, r14, r7, ROR, 3},
246 {{eq, r14, r10, r9, ROR, 5},
256 {{le, r14, r8, r0, ROR, 22},
[all …]
|
| /external/boringssl/linux-x86_64/crypto/bn/ |
| D | x86_64-mont.S | 36 pushq %r14
37 .cfi_offset %r14,-48
79 xorq %r14,%r14
137 leaq 1(%r14),%r14
141 movq (%r12,%r14,8),%rbx
205 leaq 1(%r14),%r14
206 cmpq %r9,%r14
209 xorq %r14,%r14
215 .Lsub: sbbq (%rcx,%r14,8),%rax
216 movq %rax,(%rdi,%r14,8)
[all …]
|
| /external/boringssl/linux-arm/crypto/chacha/ |
| D | chacha-armv4.S | 37 sub r14,pc,#16 @ ChaCha20_ctr32
39 adr r14,.LChaCha20_ctr32
50 ldr r4,[r14,#-32]
51 ldr r4,[r14,r4]
61 sub r14,r14,#64 @ .Lsigma
64 ldmia r14,{r0,r1,r2,r3} @ load sigma
76 str r14, [sp,#4*(32+0)] @ save out
81 ldr r14,[sp,#4*(14)]
118 mov r14,r14,ror#16
123 eor r14,r14,r2,ror#16
[all …]
|
| /external/boringssl/mac-x86_64/crypto/bn/ |
| D | x86_64-mont.S | 35 pushq %r14
78 xorq %r14,%r14
136 leaq 1(%r14),%r14
140 movq (%r12,%r14,8),%rbx
204 leaq 1(%r14),%r14
205 cmpq %r9,%r14
208 xorq %r14,%r14
214 L$sub: sbbq (%rcx,%r14,8),%rax
215 movq %rax,(%rdi,%r14,8)
216 movq 8(%rsi,%r14,8),%rax
[all …]
|
| /external/boringssl/linux-x86_64/crypto/aes/ |
| D | aes-x86_64.S | 20 movl 0(%r14,%rsi,8),%r10d
21 movl 0(%r14,%rdi,8),%r11d
22 movl 0(%r14,%rbp,8),%r12d
27 xorl 3(%r14,%rsi,8),%r10d
28 xorl 3(%r14,%rdi,8),%r11d
29 movl 0(%r14,%rbp,8),%r8d
34 xorl 3(%r14,%rsi,8),%r12d
36 xorl 3(%r14,%rbp,8),%r8d
45 xorl 2(%r14,%rsi,8),%r10d
46 xorl 2(%r14,%rdi,8),%r11d
[all …]
|
| /external/boringssl/mac-x86_64/crypto/aes/ |
| D | aes-x86_64.S | 20 movl 0(%r14,%rsi,8),%r10d
21 movl 0(%r14,%rdi,8),%r11d
22 movl 0(%r14,%rbp,8),%r12d
27 xorl 3(%r14,%rsi,8),%r10d
28 xorl 3(%r14,%rdi,8),%r11d
29 movl 0(%r14,%rbp,8),%r8d
34 xorl 3(%r14,%rsi,8),%r12d
36 xorl 3(%r14,%rbp,8),%r8d
45 xorl 2(%r14,%rsi,8),%r10d
46 xorl 2(%r14,%rdi,8),%r11d
[all …]
|