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/external/valgrind/none/tests/amd64/
Dinsn_basic.def41 adcq eflags[0x1,0x0] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654333]
42 adcq eflags[0x1,0x1] : imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654334]
49 adcq eflags[0x1,0x0] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
50 adcq eflags[0x1,0x1] : r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
51 adcq eflags[0x1,0x0] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[9999999999999999]
52 adcq eflags[0x1,0x1] : r64.uq[1234567812345678] m64.uq[8765432187654321] => 1.uq[10000000000000000]
53 adcq eflags[0x1,0x0] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
54 adcq eflags[0x1,0x1] : m64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[10000000000000000]
75 addq imm8[12] r64.uq[8765432187654321] => 1.uq[8765432187654333]
79 addq r64.uq[1234567812345678] r64.uq[8765432187654321] => 1.uq[9999999999999999]
[all …]
Dgen_insn_test.pl11 r64 => "reg64_t",
87 { r8 => "r9b", r16 => "r9w", r32 => "r9d", r64 => "r9" },
88 { r8 => "r10b", r16 => "r10w", r32 => "r10d", r64 => "r10" },
89 { r8 => "r11b", r16 => "r11w", r32 => "r11d", r64 => "r11" },
90 { r8 => "r12b", r16 => "r12w", r32 => "r12d", r64 => "r12" },
91 { r8 => "al", r16 => "ax", r32 => "eax", r64 => "rax" },
92 { r8 => "bl", r16 => "bx", r32 => "ebx", r64 => "rbx" },
93 { r8 => "cl", r16 => "cx", r32 => "ecx", r64 => "rcx" },
94 { r8 => "dl", r16 => "dx", r32 => "edx", r64 => "rdx" },
Dinsn_mmx.def4 movd mm.sd[1234,5678] r64.sd[1111,2222] => 1.sd[1234,5678]
5 movd r64.sd[1234,5678] mm.sd[1111,2222] => 1.sd[1234,5678]
/external/linux-kselftest/tools/testing/selftests/x86/
Dtest_syscall_vdso.c130 uint64_t *r64 = &regs64.r8; in check_regs64() local
136 if (*r64 == 0x7f7f7f7f7f7f7f7fULL) in check_regs64()
143 if (*r64 == 0) in check_regs64()
146 printf("[NOTE]\tR11 has changed:%016llx - assuming clobbered by SYSRET insn\n", *r64); in check_regs64()
160 if (*r64 == 0 && num <= 11) in check_regs64()
163 printf("[FAIL]\tR%d has changed:%016llx\n", num, *r64); in check_regs64()
165 } while (r64++, ++num < 16); in check_regs64()
/external/ltp/runtest/
Dltp-aio-stress.part133 ADS1004 aio-stress -I500 -o2 -S -r64 $TMPDIR/junkfile $TMPDIR/file2
38 ADS1009 aio-stress -I500 -o3 -S -r64 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/…
46 ADS1017 aio-stress -I500 -o2 -O -r64 -t2 $TMPDIR/junkfile $TMPDIR/file2
51 ADS1022 aio-stress -I500 -o3 -O -r64 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $TMPDIR…
59 ADS1030 aio-stress -I500 -o0 -S -r64 -t2 $TMPDIR/junkfile $TMPDIR/file2
64 ADS1035 aio-stress -I500 -o1 -S -r64 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $T…
72 ADS1043 aio-stress -I500 -o1 -O -r64 -t2 $TMPDIR/junkfile $TMPDIR/file2
77 ADS1048 aio-stress -I500 -o1 -O -r64 -t8 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file7 $TMPDI…
Dltp-aio-stress.part233 ADS2005 aio-stress -I500 -o3 -S -r64 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/fi…
38 ADS2010 aio-stress -I500 -o3 -O -r64 -t4 $TMPDIR/junkfile $TMPDIR/file2 $TMPDIR/file3 $TMPDIR/fi…
/external/strace/
Dipc_shm.c77 uint64_t r64; in SYS_FUNC() member
83 ? u.r32 : u.r64; in SYS_FUNC()
/external/llvm/test/CodeGen/Hexagon/
Dbit-loop.ll11 define void @foo(i64* nocapture readonly %r64, i16 zeroext %n, i16 zeroext %s, i64* nocapture %p64)…
18 %0 = load i64, i64* %r64, align 8, !tbaa !1
47 %q64.153.pn = phi i64* [ %q64.153, %for.body ], [ %r64, %for.body.preheader ]
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPU64InstrInfo.td24 // 5. The code sequences for r64 and v2i64 are probably overly conservative,
70 def r64: CodeFrag<(i32 (COPY_TO_REGCLASS CEQr64compare.Fragment, R32C))>;
119 def r64: CodeFrag<(i32 (COPY_TO_REGCLASS CLGTr64compare.Fragment, R32C))>;
153 def r64: CodeFrag<(i32 (COPY_TO_REGCLASS CLGEr64compare.Fragment, R32C))>;
204 def r64: CodeFrag<(i32 (COPY_TO_REGCLASS CGTr64compare.Fragment, R32C))>;
238 def r64: CodeFrag<(i32 (COPY_TO_REGCLASS CGEr64compare.Fragment, R32C))>;
DSPUInstrInfo.td68 def r64: LoadDForm<R64C>;
100 def r64: LoadAForm<R64C>;
132 def r64: LoadXForm<R64C>;
180 def r64: StoreDForm<R64C>;
210 def r64: StoreAForm<R64C>;
242 def r64: StoreXForm<R64C>;
355 def r64: ILRegInst<R64C, s16imm_i64, immSExt16>;
380 def r64: ILHURegInst<R64C, u16imm_i64, hi16>;
412 def r64: ILARegInst<R64C, u18imm_i64, imm18>;
703 def r64 : ADDXRegInst<R64C>;
[all …]
/external/eigen/Eigen/src/Core/arch/NEON/
DComplex.h69 float32x2_t r64;
70 r64 = vld1_f32((float *)&from);
72 return Packet2cf(vcombine_f32(r64, r64));
/external/llvm/test/Transforms/InstCombine/
Dallocsize.ll93 %r64 = bitcast i32* %r to i64*
123 store i64 %4, i64* %r64, align 8
/external/llvm/lib/Target/X86/
DX86SchedHaswell.td510 // r64.
517 // r16,m16 / r64,m64.
538 // m64,r64.
603 // r64.
648 // r64,r64,r64.
655 // r64,r64,m64.
684 // r64.
713 // r64.
1287 // r64 <- (x)mm.
1290 // (x)mm <- r64.
DX86InstrArithmetic.td306 // RDX:RAX/r64 = RAX,RDX
343 // RDX:RAX/r64 = RAX,RDX
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-US/
Den-US_kdt_g2p.pkb385 �>D���. �r64Ǹ�C�@��W."�Vѡz�VB S�H�HAk���c�r0!2&i~%c�,�̱$��G�R4�$��}�f�ُF� 7��fP� �����
/external/llvm/test/Analysis/CostModel/ARM/
Dcast.ll141 ; CHECK: Found an estimated cost of 2 for instruction: %r64 = sitofp i32 undef to double
142 %r64 = sitofp i32 undef to double
/external/valgrind/VEX/priv/
Dguest_x86_toIR.c1425 IRTemp ldt_ptr, gdt_ptr, seg_selector, r64; in handleSegOverride() local
1444 r64 = newTemp(Ity_I64); in handleSegOverride()
1456 r64, in handleSegOverride()
1473 binop(Iop_CmpNE32, unop(Iop_64HIto32, mkexpr(r64)), mkU32(0)), in handleSegOverride()
1481 return unop(Iop_64to32, mkexpr(r64)); in handleSegOverride()
2435 IRTemp r64 = newTemp(Ity_I64); in dis_Grp2() local
2441 assign( r64, mkIRExprCCall( in dis_Grp2()
2450 assign( dst1, narrowTo(ty, unop(Iop_64to32, mkexpr(r64))) ); in dis_Grp2()
2452 stmt( IRStmt_Put( OFFB_CC_DEP1, unop(Iop_64HIto32, mkexpr(r64)) )); in dis_Grp2()
Dhost_amd64_isel.c2215 HReg r64 = lookupIRTemp(env, e->Iex.RdTmp.tmp); in iselCondCode_wrk() local
2217 addInstr(env, mk_iMOVsd_RR(r64,dst)); in iselCondCode_wrk()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrArithmetic.td253 // RDX:RAX/r64 = RAX,RDX
284 // RDX:RAX/r64 = RAX,RDX
DX86GenAsmWriter.inc5999 "r64\000MMX_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_"
DX86GenAsmWriter1.inc6742 "r64\000MMX_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_"