| /external/llvm/test/CodeGen/X86/ |
| D | vec_floor.ll | 23 ; SSE41-NEXT: roundps $9, %xmm0, %xmm0
54 ; SSE41-NEXT: roundps $9, %xmm0, %xmm0
55 ; SSE41-NEXT: roundps $9, %xmm1, %xmm1
85 ; SSE41-NEXT: roundps $10, %xmm0, %xmm0
116 ; SSE41-NEXT: roundps $10, %xmm0, %xmm0
117 ; SSE41-NEXT: roundps $10, %xmm1, %xmm1
147 ; SSE41-NEXT: roundps $11, %xmm0, %xmm0
178 ; SSE41-NEXT: roundps $11, %xmm0, %xmm0
179 ; SSE41-NEXT: roundps $11, %xmm1, %xmm1
209 ; SSE41-NEXT: roundps $4, %xmm0, %xmm0
[all …]
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| D | sse41-intrinsics-fast-isel.ll | 137 ; X32-NEXT: roundps $2, %xmm0, %xmm0
142 ; X64-NEXT: roundps $2, %xmm0, %xmm0
490 ; X32-NEXT: roundps $1, %xmm0, %xmm0
495 ; X64-NEXT: roundps $1, %xmm0, %xmm0
841 ; X32-NEXT: roundps $4, %xmm0, %xmm0
846 ; X64-NEXT: roundps $4, %xmm0, %xmm0
|
| D | sse41-intrinsics-x86.ll | 382 ; SSE41-NEXT: roundps $7, %xmm0, %xmm0
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| D | stack-folding-fp-sse42.ll | 906 ;CHECK: roundps $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
|
| /external/llvm/test/Analysis/CostModel/X86/ |
| D | intrinsic-cost.ll | 4 ; If SSE4.1 roundps instruction is available it is cheap to lower, otherwise
|
| /external/swiftshader/src/Reactor/ |
| D | x86.hpp | 40 RValue<Float4> roundps(RValue<Float4> val, unsigned char imm);
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| D | Nucleus.cpp | 6758 return x86::roundps(x, 0); in Round()
6770 return x86::roundps(x, 3); in Trunc()
7077 RValue<Float4> roundps(RValue<Float4> val, unsigned char imm) in roundps() function
7080 llvm::Function *roundps = Intrinsic::getDeclaration(module, Intrinsic::x86_sse41_round_ps); in roundps() local
7082 return RValue<Float4>(Nucleus::createCall(roundps, val.value, Nucleus::createConstantInt(imm))); in roundps()
7087 return roundps(val, 1); in floorps()
7092 return roundps(val, 2); in ceilps()
|
| /external/swiftshader/third_party/LLVM/test/MC/X86/ |
| D | x86-64.s | 512 roundps $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x0e] label
|
| /external/llvm/test/MC/X86/ |
| D | x86-64.s | 550 roundps $0xE, %xmm0, %xmm0 // CHECK: encoding: [0x66,0x0f,0x3a,0x08,0xc0,0x0e] label
|
| /external/elfutils/libcpu/ |
| D | ChangeLog | 84 pmovzxdq, pmuldq, pmulld, popcnt, ptest, roundss, roundps, roundpd,
|
| /external/llvm/docs/ |
| D | Vectorizers.rst | 331 example, the loop below will be vectorized on Intel x86 if the SSE4.1 roundps
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| /external/elfutils/libcpu/defs/ |
| D | i386 | 963 01100110,00001111,00111010,00001000,{Mod}{xmmreg}{R_m},{imm8}:roundps {imm8},{Mod}{R_m},{xmmreg}
|
| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
| D | ChangeLog | 1647 roundss, roundps, roundpd, and roundsd.
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86GenAsmMatcher.inc | 4789 …{ X86::ROUNDPSr, "roundps", Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, { MCK_ImmSExti32i8, MCK_FR32…
4790 …{ X86::ROUNDPSm, "roundps", Convert__Reg1_2__Mem5_1__ImmSExti32i81_0, { MCK_ImmSExti32i8, MCK_Mem,…
|
| D | X86GenAsmWriter1.inc | 3942 "rol\t\000ror\t\000roundpd\t\000roundps\t\000roundsd\t\000roundss\t\000r"
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| D | X86InstrSSE.td | 5605 // FP round - roundss, roundps, roundsd, roundpd
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrSSE.td | 6451 // FP round - roundss, roundps, roundsd, roundpd
|