/external/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 409 rsubhn2 v0.16b, v1.8h, v2.8h 410 rsubhn2 v0.8h, v1.4s, v2.4s 411 rsubhn2 v0.4s, v1.2d, v2.2d
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D | neon-diagnostics.s | 2833 rsubhn2 v0.16b, v1.8h, v2.8b 2834 rsubhn2 v0.8h, v1.4s, v2.4h 2835 rsubhn2 v0.4s, v1.2d, v2.2s
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vsub.ll | 94 ;CHECK-NEXT: rsubhn2.16b 104 ;CHECK-NEXT: rsubhn2.8h 114 ;CHECK-NEXT: rsubhn2.4s
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D | arm64-vecFold.ll | 112 ; CHECK: rsubhn2.16b v0, v2, v3
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D | arm64-neon-3vdiff.ll | 1003 ; CHECK: rsubhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1015 ; CHECK: rsubhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1027 ; CHECK: rsubhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1039 ; CHECK: rsubhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1051 ; CHECK: rsubhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1063 ; CHECK: rsubhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1465 # CHECK: rsubhn2 v0.16b, v1.8h, v2.8h 1466 # CHECK: rsubhn2 v0.8h, v1.4s, v2.4s 1467 # CHECK: rsubhn2 v0.4s, v1.2d, v2.2d
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.c | 2735 GEN_BINARY_TEST(rsubhn2, 4s, 2d, 2d) 2737 GEN_BINARY_TEST(rsubhn2, 8h, 4s, 4s) 2739 GEN_BINARY_TEST(rsubhn2, 16b, 8h, 8h)
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D | fp_and_simd.stdout.exp | 26966 rsubhn2 v9.4s, v7.2d, v8.2d 743eef0da8cd44ce9239c3d436f3b6fb 1ee80cc366565a004c3c897103e1caf6 55… 26968 rsubhn2 v9.8h, v7.4s, v8.4s f89b47410d3f3dbc1dd80bf894648293 f0d312155449107397f084d3b07d8ab7 07… 26970 rsubhn2 v9.16b, v7.8h, v8.8h 404754a9923642857d20995f71ae57b0 e606f3e6ad419e5469d4bbd37802f1a0 5…
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1113 0x~~~~~~~~~~~~~~~~ 6e346304 rsubhn2 v4.16b, v24.8h, v20.8h 1114 0x~~~~~~~~~~~~~~~~ 6eb662e1 rsubhn2 v1.4s, v23.2d, v22.2d 1115 0x~~~~~~~~~~~~~~~~ 6e746053 rsubhn2 v19.8h, v2.4s, v20.4s
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D | log-disasm | 1113 0x~~~~~~~~~~~~~~~~ 6e346304 rsubhn2 v4.16b, v24.8h, v20.8h 1114 0x~~~~~~~~~~~~~~~~ 6eb662e1 rsubhn2 v1.4s, v23.2d, v22.2d 1115 0x~~~~~~~~~~~~~~~~ 6e746053 rsubhn2 v19.8h, v2.4s, v20.4s
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D | log-all | 3049 0x~~~~~~~~~~~~~~~~ 6e346304 rsubhn2 v4.16b, v24.8h, v20.8h 3051 0x~~~~~~~~~~~~~~~~ 6eb662e1 rsubhn2 v1.4s, v23.2d, v22.2d 3053 0x~~~~~~~~~~~~~~~~ 6e746053 rsubhn2 v19.8h, v2.4s, v20.4s
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1347 __ rsubhn2(v4.V16B(), v24.V8H(), v20.V8H()); in GenerateTestSequenceNEON() local 1348 __ rsubhn2(v1.V4S(), v23.V2D(), v22.V2D()); in GenerateTestSequenceNEON() local 1349 __ rsubhn2(v19.V8H(), v2.V4S(), v20.V4S()); in GenerateTestSequenceNEON() local
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 2667 V(rsubhn2) \
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D | assembler-aarch64.h | 2454 void rsubhn2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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D | macro-assembler-aarch64.h | 2166 V(rsubhn2, Rsubhn2) \
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D | simulator-aarch64.cc | 3673 rsubhn2(vf, rd, rn, rm); in VisitNEON3Different()
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D | logic-aarch64.cc | 3442 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::aarch64::Simulator
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D | assembler-aarch64.cc | 1955 V(rsubhn2, NEON_RSUBHN2, vd.IsQ())
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2937 void rsubhn2(const VRegister& vd,
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