| /external/clang/test/CodeGen/ |
| D | arm-arguments.c | 104 struct s18 { short f0; char f1 : 4; }; argument
105 struct s18 f18(void) {} in f18()
|
| D | arm64-arguments.c | 77 struct s18 { short f0; char f1 : 4; }; argument
78 struct s18 f18(void) {} in f18()
|
| /external/clang/test/Sema/ |
| D | bitfield-layout_1.c | 177 } s18; variable
178 CHECK_SIZE(s18,24)
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-recip.s | 46 frecpx s18, s10
|
| D | neon-scalar-by-elem-saturating-mla.s | 31 sqdmlsl d16, s18, v28.s[3]
|
| D | neon-scalar-shift-imm.s | 126 sqshrn s18, d10, #31
|
| D | neon-diagnostics.s | 234 frecpx s18, h10
867 sqsub b0, b2, s18
5097 sqshrn s18, d10, #99
|
| D | basic-a64-diagnostics.s | 1633 fnmul d1, d9, s18
|
| /external/boringssl/src/crypto/curve25519/ |
| D | curve25519.c | 3811 int64_t s18 = 2097151 & (load_3(s + 47) >> 2); in x25519_sc_reduce() local
3875 s6 += s18 * 666643; in x25519_sc_reduce()
3876 s7 += s18 * 470296; in x25519_sc_reduce()
3877 s8 += s18 * 654183; in x25519_sc_reduce()
3878 s9 -= s18 * 997805; in x25519_sc_reduce()
3879 s10 += s18 * 136657; in x25519_sc_reduce()
3880 s11 -= s18 * 683901; in x25519_sc_reduce()
3881 s18 = 0; in x25519_sc_reduce()
4189 int64_t s18; in sc_muladd() local
4246 s18 = a7 * b11 + a8 * b10 + a9 * b9 + a10 * b8 + a11 * b7; in sc_muladd()
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | remat-float0.ll | 15 …{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s2…
|
| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 2931 __ Ldr(s18, MemOperand(x17, x19, SXTW, 2)); in TEST()
9759 __ Fmov(s18, 1.0f); in TEST()
9769 __ Fadd(s0, s17, s18); in TEST()
9770 __ Fadd(s1, s18, s19); in TEST()
9771 __ Fadd(s2, s14, s18); in TEST()
9772 __ Fadd(s3, s15, s18); in TEST()
9773 __ Fadd(s4, s16, s18); in TEST()
9815 __ Fmov(s18, 1.0f); in TEST()
9825 __ Fsub(s0, s17, s18); in TEST()
9826 __ Fsub(s1, s18, s19); in TEST()
[all …]
|
| D | test-trace-aarch64.cc | 429 __ fcmlt(s18, s23, 0.0); in GenerateTestSequenceFP()
432 __ fcmp(s18, s6); in GenerateTestSequenceFP()
439 __ fcsel(s22, s18, s2, ge); in GenerateTestSequenceFP()
469 __ fcvtmu(x5, s18); in GenerateTestSequenceFP()
481 __ fcvtnu(x27, s18); in GenerateTestSequenceFP()
548 __ fnmadd(s0, s18, s26, s18); in GenerateTestSequenceFP()
552 __ fnmul(s18, s3, s17); in GenerateTestSequenceFP()
556 __ frecps(s18, s27, s1); in GenerateTestSequenceFP()
1608 __ sqrshl(s26, s18, s2); in GenerateTestSequenceNEON()
2252 __ umaxv(s18, v21.V4S()); in GenerateTestSequenceNEON()
[all …]
|
| /external/llvm/test/CodeGen/MIR/ARM/ |
| D | ARMLoadStoreDBG.mir | 95 '%s16', '%s17', '%s18', '%s19', '%s20', '%s21',
|
| D | sched-it-debug-nodes.mir | 106 '%s16', '%s17', '%s18', '%s19', '%s20', '%s21',
|
| /external/v8/src/arm/ |
| D | simulator-arm.h | 120 s16, s17, s18, s19, s20, s21, s22, s23, enumerator
|
| D | assembler-arm.h | 63 V(s16) V(s17) V(s18) V(s19) V(s20) V(s21) V(s22) V(s23) \
334 const SwVfpRegister s18 = { 18 }; variable
|
| /external/valgrind/none/tests/arm/ |
| D | vfp.c | 1582 TESTINSN_un_f32("vabs.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main()
1604 TESTINSN_un_f32("vneg.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main()
1626 TESTINSN_un_f32("vmov.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main()
1648 TESTINSN_un_f32("vsqrt.f32 s18, s17", s18, s17, i32, f2u(INFINITY)); in main()
1663 TESTINSN_un_f32("vcvt.u32.f32 s12, s18", s12, s18, i32, f2u(-8.0 + 1.0/1024.0)); in main()
1979 TESTINSN_vldr_f32("vldr s18, [r3]", s18, r3, (long) numbers + 8, 0); in main()
2255 TESTINSN_vpush_vpop_f32(s16, 0x542aa, s17, 0xaddcd5, s18, 0x87acc, s18, s19, s20); in main()
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fp-encoding.txt | 220 # CHECK: vldmiaeq r3, {s18, s19, s20, s21, s22, s23}
|
| /external/v8/benchmarks/ |
| D | regexp.js | 111 var s18 = computeInputVariants('uvqqra_ryrz', 117);
171 s18[i].replace(re2, '');
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 352 0x~~~~~~~~~~~~~~~~ 5ea0eaf2 fcmlt s18, s23, #0.0
355 0x~~~~~~~~~~~~~~~~ 1e262240 fcmp s18, s6
362 0x~~~~~~~~~~~~~~~~ 1e22ae56 fcsel s22, s18, s2, ge
392 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18
404 0x~~~~~~~~~~~~~~~~ 9e21025b fcvtnu x27, s18
471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18
475 0x~~~~~~~~~~~~~~~~ 1e318872 fnmul s18, s3, s17
479 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1
1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2
1909 0x~~~~~~~~~~~~~~~~ 6eb0aab2 umaxv s18, v21.4s
[all …]
|
| D | log-disasm | 352 0x~~~~~~~~~~~~~~~~ 5ea0eaf2 fcmlt s18, s23, #0.0
355 0x~~~~~~~~~~~~~~~~ 1e262240 fcmp s18, s6
362 0x~~~~~~~~~~~~~~~~ 1e22ae56 fcsel s22, s18, s2, ge
392 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18
404 0x~~~~~~~~~~~~~~~~ 9e21025b fcvtnu x27, s18
471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18
475 0x~~~~~~~~~~~~~~~~ 1e318872 fnmul s18, s3, s17
479 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1
1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2
1909 0x~~~~~~~~~~~~~~~~ 6eb0aab2 umaxv s18, v21.4s
[all …]
|
| D | log-all | 840 0x~~~~~~~~~~~~~~~~ 5ea0eaf2 fcmlt s18, s23, #0.0
846 0x~~~~~~~~~~~~~~~~ 1e262240 fcmp s18, s6
860 0x~~~~~~~~~~~~~~~~ 1e22ae56 fcsel s22, s18, s2, ge
920 0x~~~~~~~~~~~~~~~~ 9e310245 fcvtmu x5, s18
944 0x~~~~~~~~~~~~~~~~ 9e21025b fcvtnu x27, s18
1077 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18
1085 0x~~~~~~~~~~~~~~~~ 1e318872 fnmul s18, s3, s17
1086 # v18: 0x0000000000000000000000007fffffff (s18: nan)
1093 0x~~~~~~~~~~~~~~~~ 5e21ff72 frecps s18, s27, s1
3571 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 83 def S18 : ARMFReg<18, "s18">; def S19 : ARMFReg<19, "s19">;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 90 def S18 : ARMFReg<18, "s18">; def S19 : ARMFReg<19, "s19">;
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 303 def S18 : AArch64Reg<18, "s18", [H18]>, DwarfRegAlias<B18>;
|