/external/bison/lib/ |
D | streq.h | 69 streq6 (const char *s1, const char *s2, char s26, char s27, char s28) in streq6() argument 71 if (s1[6] == s26) in streq6() 73 if (s26 == 0) in streq6() 83 streq5 (const char *s1, const char *s2, char s25, char s26, char s27, char s28) in streq5() argument 90 return streq6 (s1, s2, s26, s27, s28); in streq5() 97 streq4 (const char *s1, const char *s2, char s24, char s25, char s26, char s27, char s28) in streq4() argument 104 return streq5 (s1, s2, s25, s26, s27, s28); in streq4() 111 streq3 (const char *s1, const char *s2, char s23, char s24, char s25, char s26, char s27, char s28) in streq3() argument 118 return streq4 (s1, s2, s24, s25, s26, s27, s28); in streq3() 125 streq2 (const char *s1, const char *s2, char s22, char s23, char s24, char s25, char s26, char s27,… in streq2() argument [all …]
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D | c-strcaseeq.h | 79 strcaseeq6 (const char *s1, const char *s2, char s26, char s27, char s28) in strcaseeq6() argument 81 if (CASEEQ (s1[6], s26)) in strcaseeq6() 83 if (s26 == 0) in strcaseeq6() 93 strcaseeq5 (const char *s1, const char *s2, char s25, char s26, char s27, char s28) in strcaseeq5() argument 100 return strcaseeq6 (s1, s2, s26, s27, s28); in strcaseeq5() 107 strcaseeq4 (const char *s1, const char *s2, char s24, char s25, char s26, char s27, char s28) in strcaseeq4() argument 114 return strcaseeq5 (s1, s2, s25, s26, s27, s28); in strcaseeq4() 121 strcaseeq3 (const char *s1, const char *s2, char s23, char s24, char s25, char s26, char s27, char … in strcaseeq3() argument 128 return strcaseeq4 (s1, s2, s24, s25, s26, s27, s28); in strcaseeq3() 135 strcaseeq2 (const char *s1, const char *s2, char s22, char s23, char s24, char s25, char s26, char … in strcaseeq2() argument [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-scalar-by-elem-saturating-mul.s | 30 sqdmulh s25, s26, v27.s[3] 47 sqrdmulh s20, s26, v27.s[1]
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D | basic-a64-diagnostics.s | 2575 ldp s6, s26, [x4, #-260] 2678 ldp s6, s26, [x4], #-260 2781 ldp s6, s26, [x4, #-260]! 2870 ldnp s6, s26, [x4, #-260]
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D | basic-a64-instructions.s | 1881 fcvt s26, h27 2113 fcvtas w25, s26 3025 stp s27, s26, [sp, #-256] 3073 stp s27, s26, [sp], #-256 3120 stp s27, s26, [sp, #-256]! 3161 stnp s27, s26, [sp, #-256]
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/external/llvm/test/MC/ARM/ |
D | d16.s | 23 @ D16-NEXT: vcvt.f32.f64 s26, d30 24 vcvt.f32.f64 s26, d30
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D | simple-fp-encoding.s | 323 @ CHECK: vmovne s25, s26, r2, r5 324 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c]
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/external/llvm/test/CodeGen/AArch64/ |
D | remat-float0.ll | 15 …5},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s2…
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/external/llvm/test/MC/Disassembler/ARM/ |
D | d16.txt | 21 # D32: vcvt.f32.f64 s26, d30
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D | fp-encoding.txt | 227 # CHECK: vstmdbeq r12!, {s25, s26, s27, s28}
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | simple-fp-encoding.s | 244 @ CHECK: vmovne s25, s26, r2, r5 245 vmovne s25, s26, r2, r5 @ encoding: [0x39,0x2a,0x45,0x1c]
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/external/clang/test/CodeGen/ |
D | x86_32-arguments-darwin.c | 120 struct s26 { struct { char a, b; } a; struct { char a, b; } b; } f26(void) { while (1) {} } in f26() argument
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/external/llvm/test/CodeGen/MIR/ARM/ |
D | ARMLoadStoreDBG.mir | 96 '%s22', '%s23', '%s24', '%s25', '%s26', '%s27',
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D | sched-it-debug-nodes.mir | 107 '%s22', '%s23', '%s24', '%s25', '%s26', '%s27',
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/external/v8/src/arm/ |
D | simulator-arm.h | 121 s24, s25, s26, s27, s28, s29, s30, s31, enumerator
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D | assembler-arm.h | 64 V(s24) V(s25) V(s26) V(s27) V(s28) V(s29) V(s30) V(s31) 342 const SwVfpRegister s26 = { 26 }; variable
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/external/v8/benchmarks/ |
D | regexp.js | 207 var s26 = computeInputVariants('VC=74.125.75.1', 81); 242 re8.exec(s26[i]);
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 330 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 443 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 473 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 515 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 1023 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] 1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 2012 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 [all …]
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D | log-disasm | 330 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 414 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 443 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 471 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 473 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 515 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 1023 0x~~~~~~~~~~~~~~~~ 5e04067a mov s26, v19.s[0] 1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26 1374 0x~~~~~~~~~~~~~~~~ 5ea25e5a sqrshl s26, s18, s2 2012 0x~~~~~~~~~~~~~~~~ 7f15975c uqshrn h28, s26, #11 [all …]
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D | log-vregs | 93 # v26: 0x00000000000000000000000000000000 (s26: 0.00000) 163 # v26: 0x0000000000000000000000003c7fffff (s26: 0.0156250) 607 # v26: 0x00000000000000008887868588878685 (s26: -8.15664e-34) <- 0x~~~~~~~~~~~~~~~~ 705 # v26: 0x00000000000000000002ff010002ff01 (s26: 2.75149e-40) <- 0x~~~~~~~~~~~~~~~~
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D | log-all | 796 0x~~~~~~~~~~~~~~~~ 7eacef4c facgt s12, s26, s12 964 0x~~~~~~~~~~~~~~~~ 1e29035f fcvtpu wzr, s26 1021 0x~~~~~~~~~~~~~~~~ 1e3918ba fdiv s26, s5, s25 1022 # v26: 0x00000000000000000000000000000000 (s26: 0.00000) 1077 0x~~~~~~~~~~~~~~~~ 1f3a4a40 fnmadd s0, s18, s26, s18 1081 0x~~~~~~~~~~~~~~~~ 1f2be81d fnmsub s29, s0, s11, s26 1165 0x~~~~~~~~~~~~~~~~ 9e02699a scvtf s26, x12, #38 1166 # v26: 0x0000000000000000000000003c7fffff (s26: 0.0156250) 1988 # v26: 0x00000000000000008887868588878685 (s26: -8.15664e-34) <- 0x~~~~~~~~~~~~~~~~ 2180 # v26: 0x00000000000000000002ff010002ff01 (s26: 2.75149e-40) <- 0x~~~~~~~~~~~~~~~~ [all …]
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D | log-state | 530 # v26: 0x00000000000000000000000000000000 (s26: 0.00000) 602 # v26: 0x0000000000000000000000003c7fffff (s26: 0.0156250) 1124 # v26: 0x00000000000000008887868588878685 (s26: -8.15664e-34) <- 0x~~~~~~~~~~~~~~~~ 1260 # v26: 0x00000000000000000002ff010002ff01 (s26: 2.75149e-40) <- 0x~~~~~~~~~~~~~~~~
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 407 __ facgt(s12, s26, s12); in GenerateTestSequenceFP() 491 __ fcvtpu(wzr, s26); in GenerateTestSequenceFP() 520 __ fdiv(s26, s5, s25); in GenerateTestSequenceFP() 548 __ fnmadd(s0, s18, s26, s18); in GenerateTestSequenceFP() 550 __ fnmsub(s29, s0, s11, s26); in GenerateTestSequenceFP() 592 __ scvtf(s26, x12, 38); in GenerateTestSequenceFP() 1257 __ mov(s26, v19.S(), 0); in GenerateTestSequenceNEON() 1570 __ sqdmull(d25, s2, s26); in GenerateTestSequenceNEON() 1608 __ sqrshl(s26, s18, s2); in GenerateTestSequenceNEON() 2355 __ uqshrn(h28, s26, 11); in GenerateTestSequenceNEON() [all …]
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D | test-assembler-aarch64.cc | 7361 __ ldr(s26, &after_s); in TEST() 7393 ASSERT_EQUAL_FP32(2.5, s26); in TEST() 7448 __ ldr(s26, &after_s); in TEST() 7479 ASSERT_EQUAL_FP32(2.5, s26); in TEST() 7715 __ ldr(s26, &after_s); in TEST() 7744 ASSERT_EQUAL_FP32(2.5, s26); in TEST() 11007 __ Fmov(s26, -0.0); in TEST() 11020 __ Frinta(s10, s26); in TEST() 11097 __ Fmov(s26, -0.0); in TEST() 11110 __ Frinti(s10, s26); in TEST() [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 87 def S26 : ARMFReg<26, "s26">; def S27 : ARMFReg<27, "s27">;
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