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Searched refs:s28 (Results 1 – 25 of 39) sorted by relevance

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/external/bison/lib/
Dstreq.h41 streq8 (const char *s1, const char *s2, char s28) in streq8() argument
43 if (s1[8] == s28) in streq8()
45 if (s28 == 0) in streq8()
55 streq7 (const char *s1, const char *s2, char s27, char s28) in streq7() argument
62 return streq8 (s1, s2, s28); in streq7()
69 streq6 (const char *s1, const char *s2, char s26, char s27, char s28) in streq6() argument
76 return streq7 (s1, s2, s27, s28); in streq6()
83 streq5 (const char *s1, const char *s2, char s25, char s26, char s27, char s28) in streq5() argument
90 return streq6 (s1, s2, s26, s27, s28); in streq5()
97 streq4 (const char *s1, const char *s2, char s24, char s25, char s26, char s27, char s28) in streq4() argument
[all …]
Dc-strcaseeq.h51 strcaseeq8 (const char *s1, const char *s2, char s28) in strcaseeq8() argument
53 if (CASEEQ (s1[8], s28)) in strcaseeq8()
55 if (s28 == 0) in strcaseeq8()
65 strcaseeq7 (const char *s1, const char *s2, char s27, char s28) in strcaseeq7() argument
72 return strcaseeq8 (s1, s2, s28); in strcaseeq7()
79 strcaseeq6 (const char *s1, const char *s2, char s26, char s27, char s28) in strcaseeq6() argument
86 return strcaseeq7 (s1, s2, s27, s28); in strcaseeq6()
93 strcaseeq5 (const char *s1, const char *s2, char s25, char s26, char s27, char s28) in strcaseeq5() argument
100 return strcaseeq6 (s1, s2, s26, s27, s28); in strcaseeq5()
107 strcaseeq4 (const char *s1, const char *s2, char s24, char s25, char s26, char s27, char s28) in strcaseeq4() argument
[all …]
/external/llvm/test/MC/ARM/
Dfullfp16.s93 vcvt.u16.f16 s28, s28, #1
101 @ ARM: vcvt.u16.f16 s28, s28, #1 @ encoding: [0x67,0xe9,0xbf,0xee]
109 @ THUMB: vcvt.u16.f16 s28, s28, #1 @ encoding: [0xbf,0xee,0x67,0xe9]
153 vseleq.f16 s30, s28, s23
154 @ ARM: vseleq.f16 s30, s28, s23 @ encoding: [0x2b,0xf9,0x0e,0xfe]
155 @ THUMB: vseleq.f16 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xf9]
Dfullfp16-neg.s71 vcvt.u16.f16 s28, s28, #1
113 vseleq.f16 s30, s28, s23
Dfp-armv8.s72 vseleq.f32 s30, s28, s23
73 @ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x2b,0xfa,0x0e,0xfe]
Dthumb-fp-armv8.s75 vseleq.f32 s30, s28, s23
76 @ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xfa]
Dsimple-fp-encoding.s366 vcvt.u16.f32 s28, s28, #1
384 @ CHECK: vcvt.u16.f32 s28, s28, #1 @ encoding: [0x67,0xea,0xbf,0xee]
/external/clang/test/CodeGen/
Darm-arguments.c145 struct s28 { _Complex char f0; }; argument
146 struct s28 f28() {} in f28()
Darm64-arguments.c106 struct s28 { _Complex char f0; }; struct
107 struct s28 f28() {} in f28()
Dx86_32-arguments-darwin.c124 struct s28 { int a; int b[]; } f28(void) { while (1) {} } in f28() struct
/external/llvm/test/MC/Disassembler/ARM/
Dfullfp16-thumb.txt70 # CHECK: vcvt.u16.f16 s28, s28, #1
112 # CHECK: vseleq.f16 s30, s28, s23
Dfullfp16-arm.txt70 # CHECK: vcvt.u16.f16 s28, s28, #1
112 # CHECK: vseleq.f16 s30, s28, s23
Dthumb-fp-armv8.txt94 # CHECK: vseleq.f32 s30, s28, s23
Dfp-armv8.txt90 # CHECK: vseleq.f32 s30, s28, s23
Dfp-encoding.txt227 # CHECK: vstmdbeq r12!, {s25, s26, s27, s28}
/external/llvm/test/CodeGen/AArch64/
Dremat-float0.ll15 …7},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s3…
/external/valgrind/none/tests/arm/
Dvfp.c1586 TESTINSN_un_f32("vabs.f32 s28, s7", s28, s7, i32, f2u(-4856.234)); in main()
1608 TESTINSN_un_f32("vneg.f32 s28, s7", s28, s7, i32, f2u(-4856.234)); in main()
1630 TESTINSN_un_f32("vmov.f32 s28, s7", s28, s7, i32, f2u(-4856.234)); in main()
1652 TESTINSN_un_f32("vsqrt.f32 s28, s7", s28, s7, i32, f2u(-4856.234)); in main()
1719 TESTINSN_cvt_f64_i32("vcvt.f64.u32 d12, s28", d12, s28, f2u(5.00003245)); in main()
1727 TESTINSN_cvt_f64_i32("vcvt.f64.s32 d12, s28", d12, s28, f2u(5.00003245)); in main()
1845 TESTINSN_cmp_f32("vcmp.f32 s7, s28", s7, f2u(425.5), s28, f2u(-456.3)); in main()
1854 TESTINSN_cmp_f32("vcmp.f32 s7, s28", s7, f2u(INFINITY), s28, f2u(-8567.456)); in main()
1863 TESTINSN_cmp_f32("vcmpe.f32 s7, s28", s7, f2u(425.5), s28, f2u(-456.3)); in main()
1871 TESTINSN_cmp_f32("vcmpe.f32 s7, s28", s7, f2u(INFINITY), s28, f2u(-8567.456)); in main()
[all …]
Dvfp.stdout.exp692 vcvt.f64.u32 d12, s28 :: Dd 0x11000000 41d02800 Sm 0x40a00044
700 vcvt.f64.s32 d12, s28 :: Dd 0x11000000 41d02800 Sm 0x40a00044
767 vcmp.f32 s7, s28 :: FPSCR 0x2 Sd 0x43d4c000 Sm 0xc3e42666
776 vcmp.f32 s7, s28 :: FPSCR 0x2 Sd 0x7f800000 Sm 0xc605ddd3
785 vcmpe.f32 s7, s28 :: FPSCR 0x2 Sd 0x43d4c000 Sm 0xc3e42666
793 vcmpe.f32 s7, s28 :: FPSCR 0x2 Sd 0x7f800000 Sm 0xc605ddd3
1203 s24 0x0099234f s25 0x00001aac s26 0x0003746c s28 0x0003746c s29 0x0099234f s30 0x00001aac
/external/llvm/test/CodeGen/MIR/ARM/
DARMLoadStoreDBG.mir97 '%s28', '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11',
Dsched-it-debug-nodes.mir108 '%s28', '%s29', '%s30', '%s31', '%d8_d10', '%d9_d11',
/external/v8/src/arm/
Dsimulator-arm.h121 s24, s25, s26, s27, s28, s29, s30, s31, enumerator
Dassembler-arm.h64 V(s24) V(s25) V(s26) V(s27) V(s28) V(s29) V(s30) V(s31)
344 const SwVfpRegister s28 = { 28 }; variable
/external/v8/benchmarks/
Dregexp.js209 var s28 = computeInputVariants('k',78);
246 s28[i].replace(/./, '');
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s2114 fcvtas x27, s28
3024 ldp s29, s28, [sp, #252]
3072 ldp s29, s28, [sp], #252
3119 ldp s29, s28, [sp, #252]!
3160 ldnp s29, s28, [sp, #252]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMRegisterInfo.td88 def S28 : ARMFReg<28, "s28">; def S29 : ARMFReg<29, "s29">;

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