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Searched refs:shift_op (Results 1 – 6 of 6) sorted by relevance

/external/v8/src/crankshaft/arm64/
Dlithium-arm64.cc1978 Shift shift_op; in DoShiftedBinaryOp() local
1980 case HValue::kShl: shift_op = LSL; break; in DoShiftedBinaryOp()
1981 case HValue::kShr: shift_op = LSR; break; in DoShiftedBinaryOp()
1982 case HValue::kSar: shift_op = ASR; break; in DoShiftedBinaryOp()
1983 default: UNREACHABLE(); shift_op = NO_SHIFT; in DoShiftedBinaryOp()
1987 res = new(zone()) LBitI(left, right, shift_op, shift_amount); in DoShiftedBinaryOp()
1989 res = new(zone()) LAddI(left, right, shift_op, shift_amount); in DoShiftedBinaryOp()
1992 res = new(zone()) LSubI(left, right, shift_op, shift_amount); in DoShiftedBinaryOp()
/external/v8/src/arm/
Dassembler-arm.cc385 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) { in Operand() argument
390 shift_op_ = shift_op; in Operand()
393 if ((shift_op == ROR) && (shift_imm == 0)) { in Operand()
396 shift_op = LSL; in Operand()
397 } else if (shift_op == RRX) { in Operand()
406 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) { in Operand() argument
407 DCHECK(shift_op != RRX); in Operand()
410 shift_op_ = shift_op; in Operand()
440 ShiftOp shift_op, int shift_imm, AddrMode am) { in MemOperand() argument
444 shift_op_ = shift_op; in MemOperand()
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Dassembler-arm.h489 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
503 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
529 ShiftOp shift_op() const { return shift_op_; } in shift_op() function
562 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
/external/v8/src/arm64/
Dsimulator-arm64.cc2047 Shift shift_op = NO_SHIFT; in DataProcessing2Source() local
2078 case LSLV_x: shift_op = LSL; break; in DataProcessing2Source()
2080 case LSRV_x: shift_op = LSR; break; in DataProcessing2Source()
2082 case ASRV_x: shift_op = ASR; break; in DataProcessing2Source()
2084 case RORV_x: shift_op = ROR; break; in DataProcessing2Source()
2088 if (shift_op != NO_SHIFT) { in DataProcessing2Source()
2097 result = ShiftOperand(reg<T>(instr->Rn()), shift_op, shift); in DataProcessing2Source()
/external/vixl/src/aarch64/
Dsimulator-aarch64.cc1938 Shift shift_op = NO_SHIFT; in VisitDataProcessing2Source() local
1993 shift_op = LSL; in VisitDataProcessing2Source()
1997 shift_op = LSR; in VisitDataProcessing2Source()
2001 shift_op = ASR; in VisitDataProcessing2Source()
2005 shift_op = ROR; in VisitDataProcessing2Source()
2061 if (shift_op != NO_SHIFT) { in VisitDataProcessing2Source()
2068 shift_op, in VisitDataProcessing2Source()
/external/valgrind/VEX/priv/
Dguest_arm_toIR.c3209 IROp shift_op, add_op; in dis_neon_data_3same() local
3223 shift_op = U ? Iop_ShrN8x16 : Iop_SarN8x16; in dis_neon_data_3same()
3227 shift_op = U ? Iop_ShrN16x8 : Iop_SarN16x8; in dis_neon_data_3same()
3231 shift_op = U ? Iop_ShrN32x4 : Iop_SarN32x4; in dis_neon_data_3same()
3242 shift_op = U ? Iop_ShrN8x8 : Iop_SarN8x8; in dis_neon_data_3same()
3246 shift_op = U ? Iop_ShrN16x4 : Iop_SarN16x4; in dis_neon_data_3same()
3250 shift_op = U ? Iop_ShrN32x2 : Iop_SarN32x2; in dis_neon_data_3same()
3261 assign(cc, binop(shift_op, in dis_neon_data_3same()
3280 binop(shift_op, in dis_neon_data_3same()
3283 binop(shift_op, in dis_neon_data_3same()
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