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Searched refs:slti (Results 1 – 25 of 74) sorted by relevance

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/external/valgrind/none/tests/mips64/
Darithmetic_instruction.stdout.exp-mips6415337 slti $t0, $t1, 0xff :: rt 0x1, rs 0x0, imm 0x00ff
15338 slti $t2, $t3, 0xffff :: rt 0x0, rs 0x0, imm 0xffff
15339 slti $a0, $a1, 0x0 :: rt 0x0, rs 0x0, imm 0x0000
15340 slti $s0, $s1, 0x23 :: rt 0x1, rs 0x0, imm 0x0023
15341 slti $t0, $t1, 0xff :: rt 0x0, rs 0x12bd6aa, imm 0x00ff
15342 slti $t2, $t3, 0xffff :: rt 0x0, rs 0x12bd6aa, imm 0xffff
15343 slti $a0, $a1, 0x0 :: rt 0x0, rs 0x12bd6aa, imm 0x0000
15344 slti $s0, $s1, 0x23 :: rt 0x0, rs 0x12bd6aa, imm 0x0023
15345 slti $t0, $t1, 0xff :: rt 0x1, rs 0x0, imm 0x00ff
15346 slti $t2, $t3, 0xffff :: rt 0x0, rs 0x0, imm 0xffff
[all …]
Darithmetic_instruction.stdout.exp-mips64r215849 slti $t0, $t1, 0xff :: rt 0x1, rs 0x0, imm 0x00ff
15850 slti $t2, $t3, 0xffff :: rt 0x0, rs 0x0, imm 0xffff
15851 slti $a0, $a1, 0x0 :: rt 0x0, rs 0x0, imm 0x0000
15852 slti $s0, $s1, 0x23 :: rt 0x1, rs 0x0, imm 0x0023
15853 slti $t0, $t1, 0xff :: rt 0x0, rs 0x12bd6aa, imm 0x00ff
15854 slti $t2, $t3, 0xffff :: rt 0x0, rs 0x12bd6aa, imm 0xffff
15855 slti $a0, $a1, 0x0 :: rt 0x0, rs 0x12bd6aa, imm 0x0000
15856 slti $s0, $s1, 0x23 :: rt 0x0, rs 0x12bd6aa, imm 0x0023
15857 slti $t0, $t1, 0xff :: rt 0x1, rs 0x0, imm 0x00ff
15858 slti $t2, $t3, 0xffff :: rt 0x0, rs 0x0, imm 0xffff
[all …]
/external/llvm/test/MC/Mips/
Dmicromips-alu-instructions.s21 # CHECK-EL: slti $3, $3, 103 # encoding: [0x63,0x90,0x67,0x00]
22 # CHECK-EL: slti $3, $3, 103 # encoding: [0x63,0x90,0x67,0x00]
64 # CHECK-EB: slti $3, $3, 103 # encoding: [0x90,0x63,0x00,0x67]
65 # CHECK-EB: slti $3, $3, 103 # encoding: [0x90,0x63,0x00,0x67]
106 slti $3, $3, 103
Dmips64-alu-instructions.s22 # CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
23 # CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
51 slti $3, $3, 103
Dmips-alu-instructions.s24 # CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
25 # CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x28]
56 slti $3, $3, 103
Dinstalias-imm-expanding.s198 # CHECK: slti $4, $5, -32768 # encoding: [0x00,0x80,0xa4,0x28]
200 # CHECK: slti $4, $5, 0 # encoding: [0x00,0x00,0xa4,0x28]
207 # CHECK: slti $4, $5, -1 # encoding: [0xff,0xff,0xa4,0x28]
/external/llvm/test/CodeGen/Mips/
Dcmov.ll230 ; slti and conditional move.
242 ; 32-CMOV-DAG: slti $[[R0:[0-9]+]], $4, 32767
247 ; 32-CMP-DAG: slti $[[R0:[0-9]+]], $4, 32767
255 ; 64-CMOV-DAG: slti $[[R0:[0-9]+]], $4, 32767
260 ; 64-CMP-DAG: slti $[[R0:[0-9]+]], $4, 32767
316 ; 32-CMOV-DAG: slti $[[R0:[0-9]+]], $4, -32768
321 ; 32-CMP-DAG: slti $[[R0:[0-9]+]], $4, -32768
329 ; 64-CMOV-DAG: slti $[[R0:[0-9]+]], $4, -32768
334 ; 64-CMP-DAG: slti $[[R0:[0-9]+]], $4, -32768
418 ; 64-CMOV-DAG: slti $[[R0:[0-9]+]], $4, 32767
[all …]
Dselgek.ll82 ; 16: slti ${{[0-9]+}}, 1000
85 ; 16: slti ${{[0-9]+}}, 1 # 16 bit inst
88 ; 16: slti ${{[0-9]+}}, 2 # 16 bit inst
91 ; 16: slti ${{[0-9]+}}, 2 # 16 bit inst
Dselltk.ll88 ; 16: slti ${{[0-9]+}}, 3 # 16 bit inst
91 ; 16: slti ${{[0-9]+}}, 3 # 16 bit inst
Dsetcc-se.ll26 ; CHECK: slti $[[R0:[0-9]+]], $4, -32768
59 ; CHECK: slti $[[R0:[0-9]+]], $4, 32767
Dsetgek.ll14 ; 16: slti ${{[0-9]+}}, -32768
Dsetltk.ll17 ; 16: slti $[[REGISTER:[0-9]+]], 10
DselTBtnezSlti.ll22 ; 16: slti ${{[0-9]+}}, 10
/external/llvm/test/MC/Mips/mips1/
Dvalid.s95 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/llvm/test/MC/Mips/mips2/
Dvalid.s121 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/llvm/test/MC/Mips/mips32/
Dvalid.s151 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/valgrind/none/tests/mips32/
DMIPS32int.stdout.exp-mips32-LE753 slti $t0, $t1, 0x00000000 :: rt 0x00000000 rs 0x00000001, imm 0x31415927
754 slti $t0, $t1, 0x00000001 :: rt 0x00000000 rs 0x31415927, imm 0x00000001
755 slti $t0, $t1, 0x00000002 :: rt 0x00000000 rs 0x31415927, imm 0x00000002
756 slti $t0, $t1, 0x0000000F :: rt 0x00000000 rs 0x31415927, imm 0x0000000f
757 slti $t0, $t1, 0x00000010 :: rt 0x00000000 rs 0x00000010, imm 0x00000010
758 slti $t0, $t1, 0x0000001F :: rt 0x00000001 rs 0x00000010, imm 0x31415927
759 slti $t0, $t1, 0x00000009 :: rt 0x00000000 rs 0x31415927, imm 0x00000009
760 slti $t0, $t1, 0x0000000A :: rt 0x00000000 rs 0x31415927, imm 0x0000000a
761 slti $t0, $t1, 0x00000000 :: rt 0x00000000 rs 0x00088000, imm 0x0000000a
762 slti $t0, $t1, 0x00000001 :: rt 0x00000001 rs 0x00000000, imm 0x00000001
[all …]
DMIPS32int.stdout.exp-mips32-BE753 slti $t0, $t1, 0x00000000 :: rt 0x00000000 rs 0x00000001, imm 0x31415927
754 slti $t0, $t1, 0x00000001 :: rt 0x00000000 rs 0x31415927, imm 0x00000001
755 slti $t0, $t1, 0x00000002 :: rt 0x00000000 rs 0x31415927, imm 0x00000002
756 slti $t0, $t1, 0x0000000F :: rt 0x00000000 rs 0x31415927, imm 0x0000000f
757 slti $t0, $t1, 0x00000010 :: rt 0x00000000 rs 0x00000010, imm 0x00000010
758 slti $t0, $t1, 0x0000001F :: rt 0x00000001 rs 0x00000010, imm 0x31415927
759 slti $t0, $t1, 0x00000009 :: rt 0x00000000 rs 0x31415927, imm 0x00000009
760 slti $t0, $t1, 0x0000000A :: rt 0x00000000 rs 0x31415927, imm 0x0000000a
761 slti $t0, $t1, 0x00000000 :: rt 0x00000000 rs 0x00088000, imm 0x0000000a
762 slti $t0, $t1, 0x00000001 :: rt 0x00000001 rs 0x00000000, imm 0x00000001
[all …]
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid.txt64 0x90 0x63 0x00 0x67 # CHECK: slti $3, $3, 103
65 0x90 0x63 0x00 0x67 # CHECK: slti $3, $3, 103
Dvalid-el.txt64 0x63 0x90 0x67 0x00 # CHECK: slti $3, $3, 103
65 0x63 0x90 0x67 0x00 # CHECK: slti $3, $3, 103
/external/llvm/test/MC/Mips/mips32r3/
Dvalid.s186 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/llvm/test/MC/Mips/mips3/
Dvalid.s186 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/llvm/test/MC/Mips/mips32r5/
Dvalid.s187 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s186 … slti $s1,$10,9489 # CHECK: slti $17, $10, 9489 # encoding: [0x29,0x51,0x25,0x11]
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.td440 // op2 can be cmpi or slti/sltiu
660 def BteqzT8SltiX16: FEXT_T8I8I16_ins<"bteqz", "slti">, cbranch16;
687 def BtnezT8SltiX16: FEXT_T8I8I16_ins<"btnez", "slti">, cbranch16;
1063 def SelTBteqZSlti: SeliT<"bteqz", "slti">;
1118 def SelTBtneZSlti: SeliT<"btnez", "slti">;
1163 def SltiRxImm16: FRI16R_ins<0b01010, "slti", IIM16Alu> {
1173 def SltiRxImmX16: FEXT_RI16R_ins<0b01010, "slti", IIM16Alu> {
1177 def SltiCCRxImmX16: FEXT_CCRXI16_ins<"slti">;

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