/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 206 # CHECK: smmulr r7, r8, r9
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D | basic-arm-instructions.txt | 1728 # CHECK: smmulr r3, r2, r1
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 206 # CHECK: smmulr r7, r8, r9
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D | basic-arm-instructions.txt | 1576 # CHECK: smmulr r3, r2, r1
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/external/valgrind/none/tests/arm/ |
D | v6intARM.stdout.exp | 875 smmulr r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 876 smmulr r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 877 smmulr r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 878 smmulr r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 879 smmulr r0, r1, r2 :: rd 0x3fffffff rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 880 smmulr r0, r1, r2 :: rd 0x00000001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 881 smmulr r0, r1, r2 :: rd 0x048e8c61 rm 0xe444dc25, rn 0xd5eef620, carryin 0, cpsr 0x00000000 882 smmulr r0, r1, r2 :: rd 0xfd764d52 rm 0x06ea9b2a, rn 0xa2108661, carryin 0, cpsr 0x00000000 883 smmulr r0, r1, r2 :: rd 0x0657af1f rm 0x448f3a5f, rn 0x17aecf57, carryin 0, cpsr 0x00000000 884 smmulr r0, r1, r2 :: rd 0xffe5afbd rm 0x4b0c2337, rn 0xffa63d6c, carryin 0, cpsr 0x00000000 [all …]
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D | v6intThumb.stdout.exp | 17556 smmulr r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ 17557 smmulr r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0xc0000000 NZ 17558 smmulr r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, c:v-in 0, cpsr 0xc0000000 NZ 17559 smmulr r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0xffffffff, c:v-in 0, cpsr 0xc0000000 NZ 17560 smmulr r0, r1, r2 :: rd 0x3fffffff rm 0x7fffffff, rn 0x7fffffff, c:v-in 0, cpsr 0xc0000000 NZ 17561 smmulr r0, r1, r2 :: rd 0x00000001 rm 0x0000ffff, rn 0x0000ffff, c:v-in 0, cpsr 0xc0000000 NZ 17562 smmulr r0, r1, r2 :: rd 0x048e8c61 rm 0xe444dc25, rn 0xd5eef620, c:v-in 0, cpsr 0xc0000000 NZ 17563 smmulr r0, r1, r2 :: rd 0xfd764d52 rm 0x06ea9b2a, rn 0xa2108661, c:v-in 0, cpsr 0xc0000000 NZ 17564 smmulr r0, r1, r2 :: rd 0x0657af1f rm 0x448f3a5f, rn 0x17aecf57, c:v-in 0, cpsr 0xc0000000 NZ 17565 smmulr r0, r1, r2 :: rd 0xffe5afbd rm 0x4b0c2337, rn 0xffa63d6c, c:v-in 0, cpsr 0xc0000000 NZ [all …]
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/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-a32.cc | 68 M(smmulr) \
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D | test-assembler-cond-rd-rn-rm-t32.cc | 67 M(smmulr) \
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 1747 smmulr r3, r2, r1 1752 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0xe7]
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D | basic-thumb2-instructions.s | 2001 smmulr r3, r2, r1 2007 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x52,0xfb,0x11,0xf3]
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3119 void smmulr(Condition cond, Register rd, Register rn, Register rm); 3120 void smmulr(Register rd, Register rn, Register rm) { smmulr(al, rd, rn, rm); } in smmulr() function
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D | disasm-aarch32.h | 1033 void smmulr(Condition cond, Register rd, Register rn, Register rm);
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D | assembler-aarch32.cc | 9544 void Assembler::smmulr(Condition cond, Register rd, Register rn, Register rm) { in smmulr() function in vixl::aarch32::Assembler 9561 Delegate(kSmmulr, &Assembler::smmulr, cond, rd, rn, rm); in smmulr()
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D | disasm-aarch32.cc | 2731 void Disassembler::smmulr(Condition cond, in smmulr() function in vixl::aarch32::Disassembler 22201 smmulr(CurrentCond(), in DecodeT32() 64661 smmulr(condition, in DecodeA32()
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D | macro-assembler-aarch32.h | 3998 smmulr(cond, rd, rn, rm); in Smmulr()
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 2520 smmulr r3, r2, r1 2525 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x32,0xf1,0x53,0xe7]
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D | basic-thumb2-instructions.s | 2436 smmulr r3, r2, r1 2442 @ CHECK: smmulr r3, r2, r1 @ encoding: [0x52,0xfb,0x11,0xf3]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2387 "smmulr", "\t$Rd, $Rn, $Rm", []>,
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D | ARMInstrInfo.td | 3575 IIC_iMUL32, "smmulr", "\t$Rd, $Rn, $Rm", []>,
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2619 "smmulr", "\t$Rd, $Rn, $Rm", []>,
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D | ARMInstrInfo.td | 3991 IIC_iMUL32, "smmulr", "\t$Rd, $Rn, $Rm", []>,
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