| /external/llvm/test/MC/AArch64/ |
| D | neon-2velem.s | 116 sqdmlal2 v0.4s, v1.8h, v1.h[2]
117 sqdmlal2 v0.2d, v1.4s, v1.s[2]
118 sqdmlal2 v0.2d, v1.4s, v22.s[2]
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| D | neon-3vdiff.s | 251 sqdmlal2 v0.4s, v1.8h, v2.8h
252 sqdmlal2 v0.2d, v1.4s, v2.4s
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| D | neon-diagnostics.s | 2505 sqdmlal2 v0.4s, v1.8s, v2.8h
2506 sqdmlal2 v0.2d, v1.4d, v2.4s
2517 sqdmlal2 v0.8h, v1.16b, v2.16b
3291 sqdmlal2 v0.4h, v1.8h, v1.h[2]
3292 sqdmlal2 v0.4s, v1.8h, v1.h[8]
3293 sqdmlal2 v0.4s, v1.8h, v16.h[2]
3294 sqdmlal2 v0.2s, v1.4s, v1.s[2]
3295 sqdmlal2 v0.2d, v1.4s, v1.s[4]
3296 sqdmlal2 v0.2d, v1.4s, v22.s[4]
|
| D | arm64-advsimd.s | 1242 sqdmlal2.4s v0, v0, v0[1]
1244 sqdmlal2.2d v0, v0, v0[3]
1311 ; CHECK: sqdmlal2.4s v0, v0, v0[1] ; encoding: [0x00,0x30,0x50,0x4f]
1313 ; CHECK: sqdmlal2.2d v0, v0, v0[3] ; encoding: [0x00,0x38,0xa0,0x4f]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-2velem-high.ll | 265 ; CHECK-NEXT: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
281 ; CHECK-NEXT: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, [[REPLICATE]].8h
293 ; CHECK-NEXT: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
307 ; CHECK-NEXT: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, [[REPLICATE]].4s
|
| D | arm64-vmul.ll | 327 ;CHECK: sqdmlal2.4s
340 ;CHECK: sqdmlal2.2d
997 ;CHECK: sqdmlal2.4s
1011 ;CHECK: sqdmlal2.2d
1797 ; CHECK: sqdmlal2.2d
1860 ; CHECK: sqdmlal2.2d
|
| D | arm64-neon-3vdiff.ll | 1747 ; CHECK: sqdmlal2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1758 ; CHECK: sqdmlal2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 2083 LogicVRegister sqdmlal2(VectorFormat vform,
2691 V(sqdmlal2) \
|
| D | assembler-aarch64.h | 1687 void sqdmlal2(const VRegister& vd,
2394 void sqdmlal2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | logic-aarch64.cc | 1069 LogicVRegister Simulator::sqdmlal2(VectorFormat vform, in sqdmlal2() function in vixl::aarch64::Simulator
1077 return sqdmlal2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmlal2()
3277 LogicVRegister Simulator::sqdmlal2(VectorFormat vform, in sqdmlal2() function in vixl::aarch64::Simulator
|
| D | macro-assembler-aarch64.h | 2191 V(sqdmlal2, Sqdmlal2) \
2375 V(sqdmlal2, Sqdmlal2) \
|
| D | simulator-aarch64.cc | 3613 sqdmlal2(vf_l, rd, rn, rm); in VisitNEON3Different()
3828 Op = &Simulator::sqdmlal2; in VisitNEONByIndexedElement()
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| D | assembler-aarch64.cc | 1928 V(sqdmlal2, NEON_SQDMLAL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
3001 V(sqdmlal2, NEON_SQDMLAL_byelement, vn.IsVector() && vn.IsQ()) \ in NEON_FPBYELEMENT_LIST()
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 1308 0x~~~~~~~~~~~~~~~~ 4ea392e1 sqdmlal2 v1.2d, v23.4s, v3.4s
1309 0x~~~~~~~~~~~~~~~~ 4f893013 sqdmlal2 v19.2d, v0.4s, v9.s[0]
1310 0x~~~~~~~~~~~~~~~~ 4e6b92da sqdmlal2 v26.4s, v22.8h, v11.8h
1311 0x~~~~~~~~~~~~~~~~ 4f4d3b86 sqdmlal2 v6.4s, v28.8h, v13.h[4]
|
| D | log-disasm | 1308 0x~~~~~~~~~~~~~~~~ 4ea392e1 sqdmlal2 v1.2d, v23.4s, v3.4s
1309 0x~~~~~~~~~~~~~~~~ 4f893013 sqdmlal2 v19.2d, v0.4s, v9.s[0]
1310 0x~~~~~~~~~~~~~~~~ 4e6b92da sqdmlal2 v26.4s, v22.8h, v11.8h
1311 0x~~~~~~~~~~~~~~~~ 4f4d3b86 sqdmlal2 v6.4s, v28.8h, v13.h[4]
|
| D | log-all | 3439 0x~~~~~~~~~~~~~~~~ 4ea392e1 sqdmlal2 v1.2d, v23.4s, v3.4s
3441 0x~~~~~~~~~~~~~~~~ 4f893013 sqdmlal2 v19.2d, v0.4s, v9.s[0]
3443 0x~~~~~~~~~~~~~~~~ 4e6b92da sqdmlal2 v26.4s, v22.8h, v11.8h
3445 0x~~~~~~~~~~~~~~~~ 4f4d3b86 sqdmlal2 v6.4s, v28.8h, v13.h[4]
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1542 __ sqdmlal2(v1.V2D(), v23.V4S(), v3.V4S()); in GenerateTestSequenceNEON() local
1543 __ sqdmlal2(v19.V2D(), v0.V4S(), v9.S(), 0); in GenerateTestSequenceNEON() local
1544 __ sqdmlal2(v26.V4S(), v22.V8H(), v11.V8H()); in GenerateTestSequenceNEON() local
1545 __ sqdmlal2(v6.V4S(), v28.V8H(), v13.H(), 4); in GenerateTestSequenceNEON() local
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3357 void sqdmlal2(const VRegister& vd,
3366 void sqdmlal2(const VRegister& vd,
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1331 # CHECK: sqdmlal2 v0.4s, v1.8h, v2.8h
1332 # CHECK: sqdmlal2 v0.2d, v1.4s, v2.4s
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| D | arm64-advsimd.txt | 1727 # CHECK: sqdmlal2.4s v0, v0, v0[1]
1729 # CHECK: sqdmlal2.2d v0, v0, v0[3]
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27986 sqdmlal2 v29.2d, v20.4s, v3.s[1] 21b674ffc393b603dcc9f9ebc9340c5a 22b90b20674d3987599b3c96a4f5eb…
27987 sqdmlal2 v29.2d, v20.4s, v3.s[2] 064f4d843130aaba6bef434207a9ba61 0a567498fd881be2e56600326489d0…
27990 sqdmlal2 v29.4s, v20.8h, v3.h[1] a54665e8c25c61f114d008bfa012a42e afcfe17ee0c6d8042db32e3dcce017…
27991 sqdmlal2 v29.4s, v20.8h, v3.h[1] cac25d3cc6eefbff3e90f0049da310e6 21db87f16ed82d961887c9bf1a9c78…
28016 sqdmlal2 v2.2d, v11.4s, v29.4s 0c65e88fc2842a6c3ddec3ba0cd956ee 5740aec20abfb1cd9ccd20e0aa086cd7…
28018 sqdmlal2 v2.4s, v11.8h, v29.8h 20e8c5f6c741b4b259db11c251023f94 e1f95445bd188fb825739680240f17ee…
|