| /external/llvm/test/MC/AArch64/ |
| D | neon-scalar-by-elem-saturating-mul.s | 6 sqdmull s1, h1, v1.h[1]
7 sqdmull s8, h2, v5.h[2]
8 sqdmull s12, h17, v9.h[3]
9 sqdmull s31, h31, v15.h[7]
10 sqdmull d1, s1, v4.s[0] define
11 sqdmull d31, s31, v31.s[3]
12 sqdmull d9, s10, v15.s[0] define
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| D | neon-scalar-mul.s | 61 sqdmull s12, h22, h12
62 sqdmull d15, s22, s12
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| D | neon-2velem.s | 247 sqdmull v0.4s, v1.4h, v2.h[2]
248 sqdmull v0.2d, v1.2s, v2.s[2]
249 sqdmull v0.2d, v1.2s, v22.s[2]
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| D | neon-diagnostics.s | 2558 sqdmull v0.4s, v1.4s, v2.4h
2559 sqdmull v0.2d, v1.2d, v2.2s
2579 sqdmull v0.8h, v1.8b, v2.8b
3583 sqdmull v0.4h, v1.4h, v2.h[2]
3584 sqdmull v0.4s, v1.4h, v2.h[8]
3585 sqdmull v0.4s, v1.4h, v16.h[4]
3586 sqdmull v0.2s, v1.2s, v2.s[2]
3587 sqdmull v0.2d, v1.2s, v2.s[4]
3588 sqdmull v0.2d, v1.2s, v22.s[4]
4839 sqdmull s12, h22, s12
[all …]
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| D | arm64-advsimd.s | 1147 sqdmull.h s0, h0, v0[7]
1148 sqdmull.s d0, s0, v0[3]
1165 ; CHECK: sqdmull.h s0, h0, v0[7] ; encoding: [0x00,0xb8,0x70,0x5f]
1166 ; CHECK: sqdmull.s d0, s0, v0[3] ; encoding: [0x00,0xb8,0xa0,0x5f]
1253 sqdmull.4s v0, v0, v0[0]
1255 sqdmull.2d v0, v0, v0[2]
1322 ; CHECK: sqdmull.4s v0, v0, v0[0] ; encoding: [0x00,0xb0,0x40,0x0f]
1324 ; CHECK: sqdmull.2d v0, v0, v0[2] ; encoding: [0x00,0xb8,0x80,0x0f]
1985 sqdmull s0, h0, h0
1986 sqdmull d0, s0, s0 define
[all …]
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| D | neon-3vdiff.s | 269 sqdmull v0.4s, v1.4h, v2.4h
270 sqdmull v0.2d, v1.2s, v2.2s
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| /external/llvm/test/CodeGen/AArch64/ |
| D | machine-copy-prop.ll | 32 …%sqdmull = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> <i16 1, i16 0, i16 0, i1…
33 …= tail call <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32> zeroinitializer, <4 x i32> %sqdmull)
85 declare <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16>, <4 x i16>)
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| D | arm64-neon-2velem-high.ll | 115 …%vqdmull15.i.i = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16>…
126 …%vqdmull15.i.i = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16>…
139 …%vqdmull9.i.i = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> …
150 …%vqdmull9.i.i = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> …
273 …%vqdmlal15.i.i = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16>…
285 …%vqdmlal15.i.i = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16>…
299 …%vqdmlal9.i.i = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> …
311 …%vqdmlal9.i.i = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %shuffle.i.i, <2 x i32> …
435 …%vqdmlsl15.i.i = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16>…
447 …%vqdmlsl15.i.i = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i.i, <4 x i16>…
[all …]
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| D | arm64-vmul.ll | 68 ;CHECK: sqdmull.4s
71 %tmp3 = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
77 ;CHECK: sqdmull.2d
80 %tmp3 = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
91 %tmp3 = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
102 %tmp3 = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
107 declare <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16>, <4 x i16>) nounwind readnone
108 declare <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32>, <2 x i32>) nounwind readnone
309 %tmp4 = call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %tmp1, <4 x i16> %tmp2)
320 %tmp4 = call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %tmp1, <2 x i32> %tmp2)
[all …]
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| D | arm64-detect-vec-redux.ll | 21 …%vqdmlal2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> undef, <2 x i32> unde…
39 declare <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32>, <2 x i32>) #1
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| D | arm64-neon-2velem.ll | 25 declare <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32>, <2 x i32>)
27 declare <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16>, <4 x i16>)
1157 …%vqdmlal2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %b, <4 x i16> %shuffl…
1168 …%vqdmlal2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %b, <2 x i32> %shuffl…
1180 …%vqdmlal2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i, <4 x i16>…
1192 …%vqdmlal2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %shuffle.i, <2 x i32>…
1203 …%vqdmlsl2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %b, <4 x i16> %shuffl…
1214 …%vqdmlsl2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %b, <2 x i32> %shuffl…
1226 …%vqdmlsl2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %shuffle.i, <4 x i16>…
1238 …%vqdmlsl2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %shuffle.i, <2 x i32>…
[all …]
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| D | arm64-neon-3vdiff.ll | 5 declare <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32>, <2 x i32>)
9 declare <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16>, <4 x i16>)
1675 ; CHECK: sqdmull {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1677 %vqdmull2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %a, <4 x i16> %b)
1683 ; CHECK: sqdmull {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1685 %vqdmull2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %a, <2 x i32> %b)
1693 %vqdmlal2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %b, <4 x i16> %c)
1702 %vqdmlal2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %b, <2 x i32> %c)
1711 %vqdmlsl2.i = tail call <4 x i32> @llvm.aarch64.neon.sqdmull.v4i32(<4 x i16> %b, <4 x i16> %c)
1720 %vqdmlsl2.i = tail call <2 x i64> @llvm.aarch64.neon.sqdmull.v2i64(<2 x i32> %b, <2 x i32> %c)
[all …]
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | neon-instructions.txt | 1346 # CHECK: sqdmull v0.4s, v1.4h, v2.4h
1347 # CHECK: sqdmull v0.2d, v1.2s, v2.2s
1778 # CHECK: sqdmull s12, h22, h12
1779 # CHECK: sqdmull d15, s22, s12
2397 # CHECK: sqdmull s1, h1, v1.h[0]
2398 # CHECK: sqdmull s1, h1, v1.h[1]
2399 # CHECK: sqdmull s1, h1, v1.h[2]
2400 # CHECK: sqdmull s1, h1, v1.h[3]
2401 # CHECK: sqdmull s1, h1, v1.h[4]
2402 # CHECK: sqdmull s1, h1, v1.h[5]
[all …]
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| D | arm64-advsimd.txt | 1612 # CHECK: sqdmull.h s0, h0, v0[7]
1613 # CHECK: sqdmull.s d0, s0, v0[3]
1738 # CHECK: sqdmull.4s v0, v0, v0[0]
1740 # CHECK: sqdmull.2d v0, v0, v0[2]
2291 # CHECK: sqdmull s0, h0, h0
2292 # CHECK: sqdmull d0, s0, s0
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| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26
1337 0x~~~~~~~~~~~~~~~~ 5fa5b1de sqdmull d30, s14, v5.s[1]
1338 0x~~~~~~~~~~~~~~~~ 5e6bd25d sqdmull s29, h18, h11
1339 0x~~~~~~~~~~~~~~~~ 5f67b9ab sqdmull s11, h13, v7.h[6]
1340 0x~~~~~~~~~~~~~~~~ 0ea8d137 sqdmull v23.2d, v9.2s, v8.2s
1341 0x~~~~~~~~~~~~~~~~ 0fa4b3b2 sqdmull v18.2d, v29.2s, v4.s[1]
1342 0x~~~~~~~~~~~~~~~~ 0e67d311 sqdmull v17.4s, v24.4h, v7.4h
1343 0x~~~~~~~~~~~~~~~~ 0f55b1e8 sqdmull v8.4s, v15.4h, v5.h[1]
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| D | log-disasm | 1336 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26
1337 0x~~~~~~~~~~~~~~~~ 5fa5b1de sqdmull d30, s14, v5.s[1]
1338 0x~~~~~~~~~~~~~~~~ 5e6bd25d sqdmull s29, h18, h11
1339 0x~~~~~~~~~~~~~~~~ 5f67b9ab sqdmull s11, h13, v7.h[6]
1340 0x~~~~~~~~~~~~~~~~ 0ea8d137 sqdmull v23.2d, v9.2s, v8.2s
1341 0x~~~~~~~~~~~~~~~~ 0fa4b3b2 sqdmull v18.2d, v29.2s, v4.s[1]
1342 0x~~~~~~~~~~~~~~~~ 0e67d311 sqdmull v17.4s, v24.4h, v7.4h
1343 0x~~~~~~~~~~~~~~~~ 0f55b1e8 sqdmull v8.4s, v15.4h, v5.h[1]
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| D | log-all | 3495 0x~~~~~~~~~~~~~~~~ 5ebad059 sqdmull d25, s2, s26
3497 0x~~~~~~~~~~~~~~~~ 5fa5b1de sqdmull d30, s14, v5.s[1]
3499 0x~~~~~~~~~~~~~~~~ 5e6bd25d sqdmull s29, h18, h11
3501 0x~~~~~~~~~~~~~~~~ 5f67b9ab sqdmull s11, h13, v7.h[6]
3503 0x~~~~~~~~~~~~~~~~ 0ea8d137 sqdmull v23.2d, v9.2s, v8.2s
3505 0x~~~~~~~~~~~~~~~~ 0fa4b3b2 sqdmull v18.2d, v29.2s, v4.s[1]
3507 0x~~~~~~~~~~~~~~~~ 0e67d311 sqdmull v17.4s, v24.4h, v7.4h
3509 0x~~~~~~~~~~~~~~~~ 0f55b1e8 sqdmull v8.4s, v15.4h, v5.h[1]
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1570 __ sqdmull(d25, s2, s26); in GenerateTestSequenceNEON() local
1571 __ sqdmull(d30, s14, v5.S(), 1); in GenerateTestSequenceNEON() local
1572 __ sqdmull(s29, h18, h11); in GenerateTestSequenceNEON() local
1573 __ sqdmull(s11, h13, v7.H(), 6); in GenerateTestSequenceNEON() local
1574 __ sqdmull(v23.V2D(), v9.V2S(), v8.V2S()); in GenerateTestSequenceNEON() local
1575 __ sqdmull(v18.V2D(), v29.V2S(), v4.S(), 1); in GenerateTestSequenceNEON() local
1576 __ sqdmull(v17.V4S(), v24.V4H(), v7.V4H()); in GenerateTestSequenceNEON() local
1577 __ sqdmull(v8.V4S(), v15.V4H(), v5.H(), 1); in GenerateTestSequenceNEON() local
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| D | test-simulator-aarch64.cc | 4201 DEFINE_TEST_NEON_3DIFF_LONG_SD(sqdmull, Basic)
4219 DEFINE_TEST_NEON_3DIFF_SCALAR_LONG_SD(sqdmull, Basic)
4434 DEFINE_TEST_NEON_BYELEMENT_DIFF(sqdmull, Basic, Basic, Basic)
4451 DEFINE_TEST_NEON_BYELEMENT_DIFF_SCALAR(sqdmull, Basic, Basic, Basic)
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| /external/vixl/src/aarch64/ |
| D | logic-aarch64.cc | 1033 LogicVRegister Simulator::sqdmull(VectorFormat vform, in sqdmull() function in vixl::aarch64::Simulator
1041 return sqdmull(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmull()
3272 LogicVRegister product = sqdmull(vform, temp, src1, src2); in sqdmlal()
3292 LogicVRegister product = sqdmull(vform, temp, src1, src2); in sqdmlsl()
3307 LogicVRegister Simulator::sqdmull(VectorFormat vform, in sqdmull() function in vixl::aarch64::Simulator
|
| D | simulator-aarch64.cc | 3622 sqdmull(vf_l, rd, rn, rm); in VisitNEON3Different()
3823 Op = &Simulator::sqdmull; in VisitNEONByIndexedElement()
4592 sqdmull(vf, rd, rn, rm); in VisitNEONScalar3Diff()
4734 Op = &Simulator::sqdmull; in VisitNEONScalarByIndexedElement()
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| D | simulator-aarch64.h | 2068 LogicVRegister sqdmull(VectorFormat vform,
2694 V(sqdmull) \
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| D | assembler-aarch64.h | 1669 void sqdmull(const VRegister& vd,
2403 void sqdmull(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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| D | macro-assembler-aarch64.h | 2195 V(sqdmull, Sqdmull) \
2372 V(sqdmull, Sqdmull) \
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| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 27980 sqdmull d31, s30, v29.s[0] ad5e47b1e95a95f41616371096e2d8be f9a3a29022b802c8a2a5ec450d94f2ca 4d…
27981 sqdmull d31, s30, v29.s[3] 89065389a6f6b2b64dcf3b145ad6745b c3a174a1c73b0ce6822d2500bd52f269 bc…
27982 sqdmull s31, h30, v13.h[1] c982438e3da5a7d06dd4dfd62dc7d4d1 0521d05cfda032fba0efe535721a3bc0 3b…
27983 sqdmull s31, h30, v13.h[5] 71657b3472bb9577fa39084953889bd6 c6b51b35863b983b81fe10da70c17183 ce…
28001 sqdmull v29.2d, v20.2s, v3.s[0] 402db767977be3c43a7bfb50536ef05e 052e7f3f2ede17d3203ec149f2261d…
28002 sqdmull v29.2d, v20.2s, v3.s[3] 908c7c0900971f74ced838021c001a7f 1029a86e6dc9fcd66aef1247d5a7a9…
28005 sqdmull v29.4s, v20.4h, v3.h[0] dec3eadede091e0306dc7d7059497665 124626e214799c11c986f60c24134d…
28006 sqdmull v29.4s, v20.4h, v3.h[7] 257666f998fb5a5ea47165df46555635 6b4c9e837b719b3876278abf0447a6…
28013 sqdmull d0, s8, s16 0b83fb7896357e270cd4a436a555c764 972bafe46ca71991c3180a7c034ec968 988d65ddc…
28014 sqdmull s0, h8, h16 bda14f25162ca2b4156f8b9b68514697 be471132dcaef162fc2a70ffba3b7386 eca3a7405…
[all …]
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