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/external/swiftshader/third_party/LLVM/test/Bitcode/
Dsse42_crc32.ll9 ; CHECK: i32 @llvm.x86.sse42.crc32.32.8(
10 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.8(
13 ; CHECK: i32 @llvm.x86.sse42.crc32.32.16(
14 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.16(
17 ; CHECK: i32 @llvm.x86.sse42.crc32.32.32(
18 ; CHECK-NOT: i32 @llvm.x86.sse42.crc32.32(
21 ; CHECK: i64 @llvm.x86.sse42.crc32.64.8(
22 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.8(
25 ; CHECK: i64 @llvm.x86.sse42.crc32.64.64(
26 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.64(
/external/llvm/test/CodeGen/X86/
Dsse42-intrinsics-x86.ll12 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <…
15 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
31 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %1, i32 7, <16 x i8> %2, i32 7, i8 7) ; <i3…
48 …%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; …
51 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
63 …%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; …
66 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
81 …%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; …
84 declare i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
99 …%res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; …
[all …]
Dsse42-intrinsics-fast-isel.ll5 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
31 …%res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, …
34 declare i32 @llvm.x86.sse42.pcmpestria128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
56 …%res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, …
59 declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
79 …%res = call i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, i…
82 declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
100 …%res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 …
104 declare <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8>, i32, <16 x i8>, i32, i8) nounwind readnone
130 …%res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %arg0, i32 %a1, <16 x i8> %arg2, i32 %a3, …
[all …]
Dsse42-intrinsics-fast-isel-x86_64.ll4 ; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
12 %res = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a0, i8 %a1)
15 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind readnone
23 %res = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1)
26 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
Dsse42.ll5 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
6 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
7 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
21 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
38 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
55 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
Dsse42_64.ll3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
Dfunction-subtarget-features.ll68 %3 = call i32 @llvm.x86.sse42.crc32.32.8(i32 %0, i8 %2)
73 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8)
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dsse42.ll1 ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
4 declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
5 declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
6 declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
9 %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
20 %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
31 %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
Dsse42_64.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64
3 declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
4 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
7 %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
15 %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
Dvec_compare-sse4.ll2 ; RUN: llc < %s -march=x86 -mattr=-sse42,+sse41 | FileCheck %s -check-prefix=SSE41
3 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s -check-prefix=SSE42
Dwiden_conv-4.ll1 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
Dwiden_conv-3.ll1 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
Dwiden_conv-2.ll1 ; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
/external/llvm/test/Transforms/InstCombine/
Dx86-crc32-demanded.ll9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64
12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind
17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dx86-crc32-demanded.ll9 ; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64
12 %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind
17 declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone
/external/skia/src/opts/
DSkOpts_sse42.cpp10 #define SK_OPTS_NS sse42
15 hash_fn = sse42::hash_fn; in Init_sse42()
/external/flac/libFLAC/
Dcpu.c54 info->ia32.sse42 = false; in disable_sse()
182 info->ia32.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42)? true : false; in FLAC__cpu_info()
201 fprintf(stderr, " SSE42 ...... %c\n", info->ia32.sse42 ? 'Y' : 'n'); in FLAC__cpu_info()
360 info->x86.sse42 = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_SSE42)? true : false; in FLAC__cpu_info()
374 fprintf(stderr, " SSE42 ...... %c\n", info->x86.sse42 ? 'Y' : 'n'); in FLAC__cpu_info()
/external/flac/libFLAC/include/private/
Dcpu.h129 FLAC__bool sse42; member
141 FLAC__bool sse42; member
/external/valgrind/none/tests/amd64/
Dpcmpxstrx64.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42
Dcrc32.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42
Dpcmpstr64.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42
Daes.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42
Dpcmpxstrx64w.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42
Dpcmpstr64w.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42
Dsse4-64.vgtest2 prereq: ../../../tests/x86_amd64_features amd64-sse42

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