/external/valgrind/none/tests/arm/ |
D | v6media.stdout.exp | 2982 ssub8 r0, r1, r2 :: rd 0x000fff02 rm 0x00f7ffff, rn 0x00e800fd, carryin 0, cpsr 0x000d0000 ge… 2983 ssub8 r0, r1, r2 :: rd 0x00f101fe rm 0x00e800fd, rn 0x00f7ffff, carryin 0, cpsr 0x000a0000 ge… 2984 ssub8 r0, r1, r2 :: rd 0x01fe00f1 rm 0x00fd00e8, rn 0xffff00f7, carryin 0, cpsr 0x000a0000 ge… 2985 ssub8 r0, r1, r2 :: rd 0xff0200df rm 0xffff00f7, rn 0x00fd0018, carryin 0, cpsr 0x00060000 ge… 2986 ssub8 r0, r1, r2 :: rd 0x0100fe21 rm 0x0000fd18, rn 0xff00fff7, carryin 0, cpsr 0x000d0000 ge… 2987 ssub8 r0, r1, r2 :: rd 0xff02000f rm 0xffff00f7, rn 0x00fd00e8, carryin 0, cpsr 0x00070000 ge… 2988 ssub8 r0, r1, r2 :: rd 0x01f7fe21 rm 0x00fefd18, rn 0xff07fff7, carryin 0, cpsr 0x00090000 ge… 2989 ssub8 r0, r1, r2 :: rd 0xff09020f rm 0xff07fff7, rn 0x00fefde8, carryin 0, cpsr 0x00070000 ge… 2990 ssub8 r0, r1, r2 :: rd 0xeaf77a6e rm 0xb8035b5b, rn 0xce0ce1ed, carryin 0, cpsr 0x00030000 ge… 2991 ssub8 r0, r1, r2 :: rd 0x6a7f3299 rm 0x146275d8, rn 0xaae3433f, carryin 0, cpsr 0x000e0000 ge… [all …]
|
/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-a32.cc | 99 M(ssub8) \
|
D | test-assembler-cond-rd-rn-rm-t32.cc | 98 M(ssub8) \
|
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 1921 ssub8 r9, r2, r4 1926 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xf4,0x9f,0x12,0xe6]
|
D | basic-thumb2-instructions.s | 2173 ssub8 r9, r2, r4 2179 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xc2,0xfa,0x04,0xf9]
|
/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3180 void ssub8(Condition cond, Register rd, Register rn, Register rm); 3181 void ssub8(Register rd, Register rn, Register rm) { ssub8(al, rd, rn, rm); } in ssub8() function
|
D | disasm-aarch32.h | 1069 void ssub8(Condition cond, Register rd, Register rn, Register rm);
|
D | assembler-aarch32.cc | 9921 void Assembler::ssub8(Condition cond, Register rd, Register rn, Register rm) { in ssub8() function in vixl::aarch32::Assembler 9938 Delegate(kSsub8, &Assembler::ssub8, cond, rd, rn, rm); in ssub8()
|
D | disasm-aarch32.cc | 2931 void Disassembler::ssub8(Condition cond, in ssub8() function in vixl::aarch32::Disassembler 21247 ssub8(CurrentCond(), in DecodeT32() 62796 ssub8(condition, Register(rd), Register(rn), Register(rm)); in DecodeA32()
|
D | macro-assembler-aarch32.h | 4237 ssub8(cond, rd, rn, rm); in Ssub8()
|
/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 2737 ssub8 r9, r2, r4 2742 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xf4,0x9f,0x12,0xe6]
|
D | basic-thumb2-instructions.s | 2634 ssub8 r9, r2, r4 2640 @ CHECK: ssub8 r9, r2, r4 @ encoding: [0xc2,0xfa,0x04,0xf9]
|
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 1748 # CHECK: ssub8 r9, r2, r4
|
/external/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 1900 # CHECK: ssub8 r9, r2, r4
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1960 def t2SSUB8 : T2I_pam<0b100, 0b0000, "ssub8">;
|
D | ARMInstrInfo.td | 3193 def SSUB8 : AAI<0b01100001, 0b11111111, "ssub8">;
|
/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 2165 def t2SSUB8 : T2I_pam<0b100, 0b0000, "ssub8">;
|
D | ARMInstrInfo.td | 3594 def SSUB8 : AAI<0b01100001, 0b11111111, "ssub8">;
|