| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vsub.ll | 33 ;CHECK-NEXT: subhn2.16b
43 ;CHECK-NEXT: subhn2.8h
53 ;CHECK-NEXT: subhn2.4s
|
| D | arm64-vadd.ll | 909 ;CHECK: subhn2.16b
921 ;CHECK: subhn2.8h
933 ;CHECK: subhn2.4s
|
| D | arm64-neon-3vdiff.ll | 871 ; CHECK: subhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
885 ; CHECK: subhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
899 ; CHECK: subhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
913 ; CHECK: subhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
927 ; CHECK: subhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
941 ; CHECK: subhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.c | 2723 GEN_BINARY_TEST(subhn2, 4s, 2d, 2d)
2725 GEN_BINARY_TEST(subhn2, 8h, 4s, 4s)
2727 GEN_BINARY_TEST(subhn2, 16b, 8h, 8h)
|
| D | fp_and_simd.stdout.exp | 26954 subhn2 v9.4s, v7.2d, v8.2d 2efa01aa3903307dd3404a10b6f1dddb 996996e5f282fdf829702b81a8cb1a7e 959…
26956 subhn2 v9.8h, v7.4s, v8.4s da4a132baf33d5cc1cab453654e3d2df ee3bcbea4c062a2f56553929ae748f90 ec0…
26958 subhn2 v9.16b, v7.8h, v8.8h 5175319fe6fef8bbb66909e2ea5a3304 2495b1611ef31ba52a7cf514a2aef5a2 2c…
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 1778 0x~~~~~~~~~~~~~~~~ 4e2960cb subhn2 v11.16b, v6.8h, v9.8h
1779 0x~~~~~~~~~~~~~~~~ 4eb86259 subhn2 v25.4s, v18.2d, v24.2d
1780 0x~~~~~~~~~~~~~~~~ 4e6162b4 subhn2 v20.8h, v21.4s, v1.4s
|
| D | log-disasm | 1778 0x~~~~~~~~~~~~~~~~ 4e2960cb subhn2 v11.16b, v6.8h, v9.8h
1779 0x~~~~~~~~~~~~~~~~ 4eb86259 subhn2 v25.4s, v18.2d, v24.2d
1780 0x~~~~~~~~~~~~~~~~ 4e6162b4 subhn2 v20.8h, v21.4s, v1.4s
|
| D | log-all | 4859 0x~~~~~~~~~~~~~~~~ 4e2960cb subhn2 v11.16b, v6.8h, v9.8h
4861 0x~~~~~~~~~~~~~~~~ 4eb86259 subhn2 v25.4s, v18.2d, v24.2d
4863 0x~~~~~~~~~~~~~~~~ 4e6162b4 subhn2 v20.8h, v21.4s, v1.4s
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 2116 __ subhn2(v11.V16B(), v6.V8H(), v9.V8H()); in GenerateTestSequenceNEON() local
2117 __ subhn2(v25.V4S(), v18.V2D(), v24.V2D()); in GenerateTestSequenceNEON() local
2118 __ subhn2(v20.V8H(), v21.V4S(), v1.V4S()); in GenerateTestSequenceNEON() local
|
| /external/vixl/src/aarch64/ |
| D | simulator-aarch64.h | 2665 V(subhn2) \
|
| D | assembler-aarch64.h | 2448 void subhn2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
|
| D | macro-assembler-aarch64.h | 2210 V(subhn2, Subhn2) \
|
| D | simulator-aarch64.cc | 3667 subhn2(vf, rd, rn, rm); in VisitNEON3Different()
|
| D | logic-aarch64.cc | 3420 LogicVRegister Simulator::subhn2(VectorFormat vform, in subhn2() function in vixl::aarch64::Simulator
|
| D | assembler-aarch64.cc | 1953 V(subhn2, NEON_SUBHN2, vd.IsQ()) \
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 3901 void subhn2(const VRegister& vd,
|